Jose Renau
Scholar

Jose Renau

Google Scholar ID: -uHod_AAAAAJ
Processor of Computer Science Engineering, UCSC
computer architecture
Citations & Impact
All-time
Citations
587
 
H-index
12
 
i10-index
21
 
Publications
20
 
Co-authors
0
 
Resume (English only)
Academic Achievements
  • NSF Medium Award: 'Practical and Efficient Accelerators with High-Frequency Chiplets' ($1M)
  • Amazon Research Award: 'Verification Constrained Hardware Optimization using Intelligent Design Agentic Programming' ($100K)
  • Google Academic Award: 'Building and Evaluating Hardware Agents' ($100K)
  • Selected publications:
  • - 'HDLEval Benchmarking LLMs for Multiple HDLs' (ISLAD 2024)
  • - 'RETROSPECTIVE: Power model validation through thermal measurements' (ISCA@50 Retrospective, 2023)
  • - 'A Multi-threaded Fast Hardware Compiler for HDLs' (CC 2023)
  • - 'Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation' (MICRO 2021)
Co-authors
0 total
Co-authors: 0 (list not available)