π€ AI Summary
This work addresses the bottleneck in high-throughput video acquisition, where the readout and transmission bandwidth of a single chip struggles to keep pace with rapidly increasing pixel counts. The authors propose a compact, high-speed video camera architecture that, for the first time, integrates low-bit gradient imaging with a multi-scale convolutional neural network (CNN) for image reconstruction. This approach substantially reduces data volume while efficiently recovering high-resolution images. By leveraging the fast readout capability of gradient sensors and sub-micron pixel integration technology, the system effectively alleviates throughput and complexity constraints. Both simulations and real-world experiments demonstrate that the proposed method achieves excellent reconstruction quality while significantly enhancing system efficiency, enabling a compact single-chip design.
π Abstract
High throughput video acquisition is a challenging problem and has been drawing increasing attention. Existing high throughput imaging systems splice hundreds of sub-images/videos into high throughput videos, suffering from extremely high system complexity. Alternatively, with pixel sizes reducing to sub-micrometer levels, integrating ultra-high throughput on a single chip is becoming feasible. Nevertheless, the readout and output transmission speed cannot keep pace with the increasing pixel numbers. To this end, this paper analyzes the strength of gradient cameras in fast readout and efficient representation, and proposes a low-bit gradient camera scheme based on existing technologies that can resolve the readout and transmission bottlenecks for high throughput video imaging. A multi-scale reconstruction CNN is proposed to reconstruct high-resolution images. Extensive experiments on both simulated and real data are conducted to demonstrate the promising quality and feasibility of the proposed method.