AutoFlows++: Hierarchical Message Flow Mining for System on Chip Designs

2026-04-12

AI Summary

Extracting high-level message flows from complex SoC communication traces is challenging due to message interleaving and causal ambiguity, which often lead to combinatorial explosion of candidates and misinterpretation of system behavior. This work proposes an architecture-guided, two-stage hierarchical mining approach: it first extracts elementary communication patterns locally at each interface, then globally synthesizes cross-component high-level message flows by leveraging the SoC’s design architecture. By integrating local pattern discovery with global architectural constraints, the method effectively mitigates pattern explosion and ambiguity, substantially improving the accuracy of communication behavior modeling. Experimental results on both synthetic traces and realistic SoC traces generated by GEM5 demonstrate that the proposed technique significantly outperforms existing methods in message flow extraction accuracy, making it well-suited for practical SoC verification scenarios.

Technology Category

• Multiagent Systems: Agent Communication
• Data Mining & Knowledge Management: Conversational Systems for Recommendation & Retrieval
• Cognitive Modeling & Cognitive Systems: Agent Architectures

Application Category

• Graph Algorithms and Modeling for the Web: Representation, reconstruction, and subgraph or motif discovery in Web-related graphs
• Social Networks and Social Media: Social mining and social search on the Web
• Systems and Infrastructure for Web, Mobile and WoT: Web performance, measurement, and characterization

Abstract

Understanding communication behavior in modern system-on-chip (SoC) designs is critical for functional verification, performance analysis, and post-silicon debugging. Communication traces capture message exchanges among system components and provide valuable insights into system behavior. However, deriving concise communication specifications from such traces remains challenging due to interleaved instances of communication flows, and ambiguous causal relationships among messages. Existing mining approaches often struggle with scalability and ambiguity when traces contain complex interleaving of message patterns across multiple components. These conditions often lead to an explosion in the number of candidate flows and inaccurate extraction of communication behaviors. This paper presents AutoFlows++, a design-architecture-guided hierarchical framework for mining message flows from communication traces of complex SoC designs. AutoFlows++ operates in two stages: local mining followed by global mining. In the local mining stage, simple communication patterns are extracted from traces observed at individual communication interfaces between components. In the global mining stage, these local patterns are composed to identify higher-level message flows that characterize communication behavior across multiple components. Experimental results on both synthetic traces and traces generated from SoC models in GEM5 demonstrate that AutoFlows++ significantly improves flow extraction accuracy compared with prior approaches, highlighting its effectiveness for practical SoC validation tasks.

Problem

• message flow mining
• system-on-chip
• communication traces
• causal ambiguity
• flow extraction

Innovation

• hierarchical message flow mining
• system-on-chip (SoC)
• communication trace analysis
• design-architecture-guided
• flow extraction accuracy