Fast Jet Tagging with MLP-Mixers on FPGAs

2025-03-05

AI Summary

To address the challenge of deploying real-time jet tagging for the Large Hadron Collider (LHC) on resource-constrained hardware such as FPGAs, this work introduces MLP-Mixer—the first application of this architecture to high-energy physics jet classification. We propose a non-permutation-invariant sequence encoding scheme to enable feature-priority scheduling and integrate fine-grained quantization with distributed arithmetic for FPGA co-optimization. Compared to state-of-the-art models, our approach achieves comparable or superior classification accuracy while reducing FPGA resource utilization by 97%, doubling throughput, and cutting inference latency by 50%. This work overcomes the efficiency bottleneck of sequence modeling on FPGAs and establishes a new benchmark for real-time AI inference in high-energy physics.

Technology Category

• Machine Learning: Hardware-aware ML
• Humans and AI: Human-in-the-loop Machine Learning
• Planning, Routing, and Scheduling: Planning with Language Models

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• User Modeling, Personalization and Recommendation: Federated recommendation systems and personalization
• Search and Retrieval-Augmented AI: Web learning to rank, online learning, and counterfactual learning for ranking

Abstract

We explore the innovative use of MLP-Mixer models for real-time jet tagging and establish their feasibility on resource-constrained hardware like FPGAs. MLP-Mixers excel in processing sequences of jet constituents, achieving state-of-the-art performance on datasets mimicking Large Hadron Collider conditions. By using advanced optimization techniques such as High-Granularity Quantization and Distributed Arithmetic, we achieve unprecedented efficiency. These models match or surpass the accuracy of previous architectures, reduce hardware resource usage by up to 97%, double the throughput, and half the latency. Additionally, non-permutation-invariant architectures enable smart feature prioritization and efficient FPGA deployment, setting a new benchmark for machine learning in real-time data processing at particle colliders.

Problem

• Real-time jet tagging using MLP-Mixer models on FPGAs.
• Achieving high efficiency with advanced optimization techniques.
• Setting benchmarks for ML in particle collider data processing.

Innovation

• MLP-Mixer models for real-time jet tagging
• High-Granularity Quantization and Distributed Arithmetic
• Non-permutation-invariant architectures for FPGA deployment