A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor

2026-04-10

AI Summary

This work proposes an ultra-low-power, highly linear voltage-to-spike-frequency converter to address the performance degradation of conventional neuromorphic encoders in the subthreshold region caused by nonlinearity. By integrating a bulk-driven differential transconductor without tail current sources, a translinear linearization network, and a DPI-based leaky integrate-and-fire (LIF) neuron, the design effectively suppresses large-signal sinh nonlinearity and achieves a stable, tunable voltage-to-current gain under a 0.5 V supply. Fabricated in TSMC 0.18-μm CMOS technology, the prototype demonstrates less than 5.6% linearity error over a 0.1–0.4 V input range, with power consumption ranging from 22 to 180 nW and a core area of only 0.0074 mm², offering an efficient encoding solution for low-power neuromorphic sensing applications.

Technology Category

• Cognitive Modeling & Cognitive Systems: Neural Spike Coding
• Machine Learning: Hardware-aware ML
• Humans and AI: Brain-Sensing and Analysis

Application Category

• Economics, Online Markets and Human Computation: Cost models of using LLMs in production systems
• Systems and Infrastructure for Web, Mobile and WoT: Energy management for devices in mobile Web and WoT environments
• Graph Algorithms and Modeling for the Web: Representation, reconstruction, and subgraph or motif discovery in Web-related graphs

Abstract

This work introduces an ultralow-power voltage-to-spike encoder that achieves near-linear voltage-to-firing-rate conversion by pairing a linearized bulk-driven transconductor with a DPI-based LIF neuron. A tail-less bulk-driven differential pair improves large-signal linearity, while a translinear linearization network suppresses the dominant sinh nonlinearity and stabilizes the bias-tunable V-to-I gain. The resulting current feeds a DPI front-end that linearizes current-to-spike conversion. Fabricated in TSMC 0.18-um CMOS and operating at VDD = 0.5 V with 2-27 nA reference current, the encoder achieves a deviation of less than 5.6 percent from linearity over 0.1-0.4 V input, consumes 22-180 nW, and occupies 0.0074 mm^2.

Problem

• voltage-to-spike encoder
• neuromorphic
• linearity
• ultralow-power
• bulk-driven transconductor

Innovation

• bulk-driven transconductor
• voltage-to-spike encoder
• neuromorphic engineering
• linearity enhancement
• ultra-low-power