🤖 AI Summary
Training deep graph neural networks on large-scale circuit graphs is hindered by prohibitive GPU memory consumption and computational overhead, limiting scalability. This work proposes GSR-GNN, a novel framework that, for the first time, integrates invertible residual architectures with domain-aware grouped sparse nonlinear operators to effectively compress node embeddings. Furthermore, it introduces an optimized execution pipeline that minimizes activation storage fragmentation and data movement. The proposed approach substantially reduces both memory footprint and training time, achieving up to an 87.2% reduction in peak memory usage and over 30× training speedup on circuit graph benchmarks, all while preserving task performance with negligible degradation.
📝 Abstract
Graph Neural Networks (GNNs) show strong promise for circuit analysis, but scaling to modern large-scale circuit graphs is limited by GPU memory and training cost, especially for deep models. We revisit deep GNNs for circuit graphs and show that, when trainable, they significantly outperform shallow architectures, motivating an efficient, domain-specific training framework. We propose Grouped-Sparse-Reversible GNN (GSR-GNN), which enables training GNNs with up to hundreds of layers while reducing both compute and memory overhead. GSR-GNN integrates reversible residual modules with a group-wise sparse nonlinear operator that compresses node embeddings without sacrificing task-relevant information, and employs an optimized execution pipeline to eliminate fragmented activation storage and reduce data movement. On sampled circuit graphs, GSR-GNN achieves up to 87.2\% peak memory reduction and over 30$\times$ training speedup with negligible degradation in correlation-based quality metrics, making deep GNNs practical for large-scale EDA workloads.