Mapping Spiking Neural Networks to Heterogeneous Crossbar Architectures using Integer Linear Programming

2025-03-03

AI Summary

Efficiently mapping large-scale spiking neural networks (SNNs) onto heterogeneous memristive crossbar arrays remains challenging due to hardware non-uniformity and the lack of scalable, structure-agnostic mapping methods. Method: This paper proposes the first integer linear programming (ILP) formulation supporting arbitrary heterogeneous crossbar dimensions—eliminating reliance on predefined connectivity patterns—and jointly optimizing for area footprint, inter-crossbar routing overhead, and runtime spike transmission. The approach integrates SNN topology modeling, heterogeneous hardware-aware mapping compilation, and profile-guided optimization. Results: Experiments show that, compared to homogeneous mapping baselines, our method reduces area by 16.7–27.6%; incorporating heterogeneity further shrinks area by 66.9–72.7%. Inter-crossbar routing decreases by 11.9–26.4%, spike transmission volume drops by 0.5–14.8%, and ILP solving time accelerates by 1–3 orders of magnitude. This work establishes a scalable, automated compilation framework for heterogeneous neuromorphic computing, enabling ultra-low-power brain-inspired systems.

Technology Category

• Cognitive Modeling & Cognitive Systems: Neural Spike Coding
• Machine Learning: Hardware-aware ML
• Planning, Routing, and Scheduling: Optimization of Spatio-temporal Systems

Application Category

• Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphs
• Systems and Infrastructure for Web, Mobile and WoT: Experiences and lessons learnt from Web-based algorithms and system deployments
• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines

Abstract

Advances in novel hardware devices and architectures allow Spiking Neural Network evaluation using ultra-low power, mixed-signal, memristor crossbar arrays. As individual network sizes quickly scale beyond the dimensional capabilities of single crossbars, networks must be mapped onto multiple crossbars. Crossbar sizes within modern Memristor Crossbar Architectures are determined predominately not by device technology but by network topology; more, smaller crossbars consume less area thanks to the high structural sparsity found in larger, brain-inspired SNNs. Motivated by continuing increases in SNN sparsity due to improvements in training methods, we propose utilizing heterogeneous crossbar sizes to further reduce area consumption. This approach was previously unachievable as prior compiler studies only explored solutions targeting homogeneous MCAs. Our work improves on the state-of-the-art by providing Integer Linear Programming formulations supporting arbitrarily heterogeneous architectures. By modeling axonal interactions between neurons our methods produce better mappings while removing inhibitive a priori knowledge requirements. We first show a 16.7-27.6% reduction in area consumption for square-crossbar homogeneous architectures. Then, we demonstrate 66.9-72.7% further reduction when using a reasonable configuration of heterogeneous crossbar dimensions. Next, we present a new optimization formulation capable of minimizing the number of inter-crossbar routes. When applied to solutions already near-optimal in area an 11.9-26.4% routing reduction is observed without impacting area consumption. Finally, we present a profile-guided optimization capable of minimizing the number of runtime spikes between crossbars. Compared to the best-area-then-route optimized solutions we observe a further 0.5-14.8% inter-crossbar spike reduction while requiring 1-3 orders of magnitude less solver time.

Problem

• Mapping Spiking Neural Networks to heterogeneous crossbar architectures.
• Reducing area consumption using heterogeneous crossbar sizes.
• Optimizing inter-crossbar routes and minimizing runtime spikes.

Innovation

• Utilizes heterogeneous crossbar sizes for area reduction
• Employs Integer Linear Programming for arbitrary architectures
• Optimizes inter-crossbar routes and runtime spike reduction