Causal-Guided Dimension Reduction for Efficient Pareto Optimization

📅 2025-10-10
📈 Citations: 0
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🤖 AI Summary
Multi-objective optimization of analog circuits faces severe efficiency bottlenecks due to high-dimensional parameter spaces, strong feedback coupling, and computationally expensive transistor-level simulations. Method: This paper proposes CaDRO, a causal-guided dimensionality reduction optimization framework. It introduces causal discovery to analog design—constructing a quantitative causal graph via hybrid observational-interventional inference—to identify and rank parameters by their causal effects on objectives, then dynamically fixes low-impact variables for structured dimensionality reduction. Subsequent Pareto optimization employs NSGA-II in the reduced space. Contribution/Results: Evaluated on a folded-cascode amplifier and an LDO regulator, CaDRO achieves up to 10× faster convergence. Hypervolume improves from 0.56 to 0.94 (amplifier) and from 0.65 to 0.81 (LDO), while the number of non-dominated solutions increases significantly—demonstrating superior scalability and Pareto front quality.

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📝 Abstract
Multi-objective optimization of analog circuits is hindered by high-dimensional parameter spaces, strong feedback couplings, and expensive transistor-level simulations. Evolutionary algorithms such as Non-dominated Sorting Genetic Algorithm II (NSGA-II) are widely used but treat all parameters equally, thereby wasting effort on variables with little impact on performance, which limits their scalability. We introduce CaDRO, a causal-guided dimensionality reduction framework that embeds causal discovery into the optimization pipeline. CaDRO builds a quantitative causal map through a hybrid observational-interventional process, ranking parameters by their causal effect on the objectives. Low-impact parameters are fixed to values from high-quality solutions, while critical drivers remain active in the search. The reduced design space enables focused evolutionary optimization without modifying the underlying algorithm. Across amplifiers, regulators, and RF circuits, CaDRO converges up to 10$ imes$ faster than NSGA-II while preserving or improving Pareto quality. For instance, on the Folded-Cascode Amplifier, hypervolume improves from 0.56 to 0.94, and on the LDO regulator from 0.65 to 0.81, with large gains in non-dominated solutions.
Problem

Research questions and friction points this paper is trying to address.

Reducing high-dimensional parameter spaces in analog circuit optimization
Identifying critical design parameters using causal discovery methods
Accelerating Pareto optimization while maintaining solution quality
Innovation

Methods, ideas, or system contributions that make the work stand out.

Causal-guided dimensionality reduction framework for optimization
Hybrid observational-interventional process builds causal map
Fixes low-impact parameters while optimizing critical drivers