Serial Polar Automorphism Ensemble Decoders for Physical Unclonable Functions

📅 2025-10-10
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🤖 AI Summary
To address the challenge of achieving ultra-low block error rates (≤10⁻⁶) for key regeneration from physical unclonable functions (PUFs) with high raw bit error rates (up to 22%), this paper proposes a low-complexity error-correction scheme integrating Polar codes with automated ensemble decoding (AED). The method employs a serial successive-cancellation (SC) decoding architecture that reuses a single decoder core and incorporates a cascaded recursive interleaver to significantly expand the candidate decoding path set with minimal hardware overhead; a 3-bit quantization strategy is further adopted to reduce resource consumption. Under a constraint of 312 information bits, the proposed scheme reduces codeword length and helper data storage by 1.75× compared to a BCH-based baseline, achieves a block error rate on the order of 10⁻⁶, and substantially saves chip area.

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📝 Abstract
Physical unclonable functions (PUFs) involve challenging practical applications of error-correcting codes (ECCs), requiring extremely low failure rates on the order of $10^{-6}$ and below despite raw input bit error rates as high as 22%. These requirements call for an efficient ultra-low rate code design. In this work, we propose a novel coding scheme tailored for PUFs based on Polar codes and a low-complexity version of automorphism ensemble decoding (AED). Notably, our serial AED scheme reuses a single successive cancellation (SC) decoder across multiple decoding attempts. By introducing cascaded and recursive interleavers, we efficiently scale the number of AED candidates without requiring expensive large multiplexers. An aggressive quantization strategy of only 3 bits per message further reduces the area requirements of the underlying SC decoder. The resulting coding scheme achieves the same block error rate of $10^{-6}$ as our baseline based on Bose-Ray-Chaudhuri-Hocquenghem (BCH) codes while requiring 1.75x fewer codeword bits to encode the same K = 312 payload bits. This reduction translates directly into 1.75x less helper data storage and, consequently, a smaller overall chip area.
Problem

Research questions and friction points this paper is trying to address.

Achieving ultra-low failure rates for Physical Unclonable Functions
Designing efficient error-correcting codes with high bit error rates
Reducing helper data storage and chip area requirements
Innovation

Methods, ideas, or system contributions that make the work stand out.

Serial automorphism ensemble decoding with single SC decoder
Cascaded recursive interleavers for scaling candidates
Aggressive 3-bit quantization reducing area requirements
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