LACIN: Linearly Arranged Complete Interconnection Networks

📅 2026-01-01
🏛️ IEEE computer architecture letters
📈 Citations: 0
Influential: 0
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🤖 AI Summary
This work addresses the escalating wiring and routing complexity in large-scale interconnection networks, where the number of links grows quadratically with system scale. To overcome this challenge, the paper proposes LACIN (Linearly Alignable Complete Interconnection Network), an innovative architecture that leverages a port-index alignment mechanism to map a complete-graph topology onto a linearly deployable structure. This approach drastically reduces physical wiring complexity while unifying interconnect design across multiple scales—from VLSI chips to supercomputers—and significantly simplifies routing logic. LACIN provides a highly scalable and easily deployable interconnection solution applicable to parallel systems ranging from chip-level to exascale supercomputing infrastructures.

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📝 Abstract
Several interconnection networks are based on the complete graph topology. Networks with a moderate size can be based on a single complete graph. However, large-scale networks such as Dragonfly and HyperX use, respectively, a hierarchical or a multi-dimensional composition of complete graphs. The number of links in these networks is huge and grows rapidly with their size. This paper introduces LACIN, a set of complete graph implementations that use identically indexed ports to link switches. This way of implementing the network reduces the complexity of its cabling and its routing. LACIN eases the deployment of networks for parallel computers of different scales, from VLSI systems to the largest supercomputers.
Problem

Research questions and friction points this paper is trying to address.

interconnection networks
complete graph
scalability
cabling complexity
routing complexity
Innovation

Methods, ideas, or system contributions that make the work stand out.

LACIN
complete graph
interconnection networks
port indexing
routing simplification
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Mateo Valero
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Computer ArchitectureSupercomputers