SemML 2.0: Synthesizing Controllers for LTL

📅 2026-04-27
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🤖 AI Summary
This work addresses the problem of automatically synthesizing reactive controllers from Linear Temporal Logic (LTL) specifications for safety-critical systems. We propose a novel framework that integrates automata-theoretic techniques, partial state-space exploration, and machine learning–guided search, enhanced with multiple heuristic strategies and optimized using AIGER/Mealy representations. This approach achieves a breakthrough balance between synthesis efficiency and controller compactness. Evaluated on the SYNTCOMP benchmark suite, our method substantially outperforms state-of-the-art tools—including Strix, LtlSynt, and SemML 1.0—by solving more instances faster while maintaining industry-leading solution quality.

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📝 Abstract
Synthesizing a reactive system from specifications given in linear temporal logic (LTL) is a classical problem, finding its applications in safety-critical systems design. These systems are typically represented using either Mealy machines or AIGER circuits. We present the second version of SemML, which outperforms all state-of-the-art tools for finding either solution. Aside from implementing the classical automata-theoretic approach, our tool utilizes partial exploration and machine-learning guidance for obtaining solutions efficiently, and numerous heuristics and improvements of classic algorithms for extracting small representations of these solutions. We evaluate our tool against the existing state-of-the-art tools (in particular Strix, LtlSynt, and the previous version of SemML) on the dataset of the synthesis competition SYNTCOMP. We show that we solve significantly more instances and do so much faster than other tools, while maintaining state-of-the-art solution quality.
Problem

Research questions and friction points this paper is trying to address.

controller synthesis
linear temporal logic
reactive systems
safety-critical systems
Innovation

Methods, ideas, or system contributions that make the work stand out.

LTL synthesis
machine learning guidance
partial exploration
Mealy machines
AIGER circuits