Energy-Efficient Approximate Full Adders Applying Memristive Serial IMPLY Logic For Image Processing

πŸ“… 2024-06-08
πŸ›οΈ arXiv.org
πŸ“ˆ Citations: 3
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πŸ€– AI Summary
To address the power and memory-wall bottlenecks inherent in von Neumann architectures, this work proposes four memristor-based serial IMPPLY-logic approximate full addersβ€”the first to introduce material implication Boolean operations into memristive approximate computing design. The approach significantly reduces computational steps (up to 40% fewer), while jointly optimizing energy efficiency, area overhead, and accuracy. Implemented as 8-bit approximate adders, the designs achieve 49–75% energy savings over exact full adders and an additional 41% reduction compared to state-of-the-art approximate adders. In image processing applications, they attain PSNR >30 dB, satisfying perceptual quality requirements. By unifying in-memory computing, approximate computing, and emerging memristive logic, this work delivers a scalable, circuit-level solution for energy-efficient image processing hardware.

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πŸ“ Abstract
Researchers and designers are facing problems with memory and power walls, considering the pervasiveness of Von-Neumann architecture in the design of processors and the problems caused by reducing the dimensions of deep sub-micron transistors. Memristive Approximate Computing (AC) and In-Memory Processing (IMP) can be promising solutions to these problems. We have tried to solve power and memory wall problems by presenting the implementation algorithm of four memristive approximate full adders applying the Material Implication (IMPLY) method. The proposed circuits reduce the number of computational steps by up to 40% compared to State-of-the-art (SOA). The energy consumption of the proposed circuits improves over the previous exact ones by 49%-75% and over the approximate full adders by up to 41%. Multiple error evaluation criteria evaluate the computational accuracy of the proposed approximate full adders in three scenarios in the 8-bit approximate adder structure. The proposed approximate full adders are evaluated in three image processing applications in three scenarios. The results of application-level simulation indicate that the four proposed circuits can be applied in all three scenarios, considering the acceptable image quality metrics of the output images (the Peak Signal to Noise Ratio (PSNR) of the output images is greater than 30 dB).
Problem

Research questions and friction points this paper is trying to address.

Addressing memory and power walls in processor design
Implementing energy-efficient memristive approximate full adders
Applying approximate computing to image processing applications
Innovation

Methods, ideas, or system contributions that make the work stand out.

Memristive approximate full adders using IMPLY logic
Reduces computational steps by up to 40%
Improves energy consumption by up to 75%
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S
Seyed Erfan Fatemieh
Department of Computer Architecture, Faculty of Computer Engineering, University of Isfahan, Isfahan 8174673441, Iran
M
M. R. Reshadinezhad
Department of Computer Architecture, Faculty of Computer Engineering, University of Isfahan, Isfahan 8174673441, Iran