Architect of the Bits World: Masked Autoregressive Modeling for Circuit Generation Guided by Truth Table

2025-02-18

AI Summary

Logic synthesis is a critical stage in electronic design automation (EDA) for optimizing circuit area and power; however, conventional heuristic approaches yield suboptimal results, while existing differentiable architecture search (DAS) methods suffer from high computational overhead, susceptibility to local optima, and hyperparameter sensitivity. This paper proposes the first end-to-end generative framework tailored for logic synthesis, conditioning generation on truth tables and unifying conditional generative modeling with DAS. Key contributions include: (i) CircuitVQ, the first vector-quantized circuit tokenizer; (ii) CircuitAR, a masked autoregressive circuit generator; and (iii) a truth-table-guided circuit autoencoder integrating vector quantization. Experiments demonstrate substantial improvements in area and power optimization, enhanced convergence stability, and superior hyperparameter robustness—outperforming both industrial synthesis tools and state-of-the-art DAS methods across multiple benchmark circuits.

Technology Category

• Machine Learning: Deep Generative Models & Autoencoders
• Search and Optimization: Learning to Search
• Natural Language Processing: Code Generation / Program Synthesis from Natural Language

Application Category

• Economics, Online Markets and Human Computation: Economic ramifications for generative AI infrastructure and applications
• Search and Retrieval-Augmented AI: Web learning to rank, online learning, and counterfactual learning for ranking
• Graph Algorithms and Modeling for the Web: Foundation models and LLMs for Web-related graphs

Abstract

Logic synthesis, a critical stage in electronic design automation (EDA), optimizes gate-level circuits to minimize power consumption and area occupancy in integrated circuits (ICs). Traditional logic synthesis tools rely on human-designed heuristics, often yielding suboptimal results. Although differentiable architecture search (DAS) has shown promise in generating circuits from truth tables, it faces challenges such as high computational complexity, convergence to local optima, and extensive hyperparameter tuning. Consequently, we propose a novel approach integrating conditional generative models with DAS for circuit generation. Our approach first introduces CircuitVQ, a circuit tokenizer trained based on our Circuit AutoEncoder We then develop CircuitAR, a masked autoregressive model leveraging CircuitVQ as the tokenizer. CircuitAR can generate preliminary circuit structures from truth tables, which guide DAS in producing functionally equivalent circuits. Notably, we observe the scalability and emergent capability in generating complex circuit structures of our CircuitAR models. Extensive experiments also show the superior performance of our method. This research bridges the gap between probabilistic generative models and precise circuit generation, offering a robust solution for logic synthesis.

Problem

• Optimizes gate-level circuits
• Reduces computational complexity
• Enhances circuit generation accuracy

Innovation

• Conditional generative models integration
• Masked autoregressive model CircuitAR
• Circuit tokenizer CircuitVQ