🤖 AI Summary
This work addresses the multi-objective optimization challenges faced by stacked autoencoders (SAEs) deployed on edge devices for anomaly detection, including limited resources, poor dynamic adaptability, high power consumption, and low inference efficiency. For the first time, a multi-objective optimization framework is introduced into edge-oriented SAE design, jointly integrating model pruning, a multi-branch early-exit architecture, and matrix approximation techniques. A multi-objective heuristic algorithm is employed to co-optimize storage footprint, power consumption, inference latency, and model update efficiency. Experimental results demonstrate that on x86 platforms, the proposed approach achieves over 50% reduction in both storage and power usage, a 28% improvement in runtime efficiency, and an 11.8× compression ratio. On ARM-based edge devices, it yields a 15% speedup in inference latency while enabling efficient cloud-edge collaborative deployment.
📝 Abstract
Stacked AutoEncoders (SAE) have been widely adopted in edge anomaly detection scenarios. However, the resource-intensive nature of SAE can pose significant challenges for edge devices, which are typically resource-constrained and must adapt rapidly to dynamic and changing conditions. Optimizing SAE to meet the heterogeneous demands of real-world deployment scenarios, including high performance under constrained storage, low power consumption, fast inference, and efficient model updates, remains a substantial challenge. To address this, we propose an integrated optimization framework that jointly considers these critical factors to achieve balanced and adaptive system-level optimization. Specifically, we formulate SAE optimization for edge anomaly detection as a multi-objective optimization problem and propose MO-SAE (Multi-Objective Stacked AutoEncoders). The multiple objectives are addressed by integrating model clipping, multi-branch exit design, and a matrix approximation technique. In addition, a multi-objective heuristic algorithm is employed to effectively balance the competing objectives in SAE optimization. Our results demonstrate that the proposed MO-SAE delivers substantial improvements over the original approach. On the x86 architecture, it reduces storage space and power consumption by at least 50%, improves runtime efficiency by no less than 28%, and achieves an 11.8% compression rate, all while maintaining application performance. Furthermore, MO-SAE runs efficiently on edge devices with ARM architecture. Experimental results show a 15% improvement in inference speed, facilitating efficient deployment in cloud-edge collaborative anomaly detection systems.