Stabilizers for Compiling Logical Circuits under Hardware Constraints

2026-04-27

AI Summary

This work addresses the challenge of fault-tolerant compilation on noisy quantum hardware by proposing an optimization method that integrates logical redundancy from quantum error-correcting codes with device connectivity constraints. It formalizes, for the first time, the selection of logically equivalent operations within the framework of the special unitary group and reformulates this problem as a tractable least-squares optimization. By synergistically combining the [[4,2,2]] code, analysis of logical operator equivalences, least-squares optimization, and compressed sensing techniques, the approach directly leverages native physical Hamiltonians to implement target logical operations—bypassing the need for high-overhead SWAP gates. This strategy significantly reduces compilation overhead while adhering to hardware connectivity limitations.

Abstract

To implement quantum algorithms on a quantum computer, we must overcome the twin problems of fault-tolerance -- how can we realize a relatively noiseless computation by cleverly combining noisy components? -- and compilation -- how can we realize an arbitrary quantum algorithm given the basic operations available on the quantum device at hand? We show how treating the former problem via error-correcting codes enables greater flexibility in resolving the latter. Specifically, we explicitly leverage the fact that error-correcting codes introduce redundancy which renders physically distinct operators logically indistinguishable. In terms of computation, it suffices to implement any operator logically equivalent to some target, yet from a compilation perspective, certain choices may be preferable to others. Our novel contribution is making this intuition precise in the general setting of the special unitary group. In particular, we describe how to reduce the problem of making a compilation-ideal choice to a least squares problem and provide a closed form solution thereof. Using our framework, it is possible to circumvent inserting costly swaps to adhere to hardware connectivity; instead, we could realize the logical target through a distinct physical Hamiltonian that is natively accessible. We elucidate our approach using the $[[4,2,2]]$ code. We discuss connections to compressed sensing that may pave the way to efficient compilation leveraging physical degrees of freedom.

Problem

• quantum compilation
• hardware constraints
• fault-tolerance
• logical circuits
• error-correcting codes

Innovation

• quantum error correction
• circuit compilation
• logical equivalence
• least squares optimization
• hardware constraints