Reelay: Online Temporal Logic Monitoring Framework

📅 2026-04-24
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🤖 AI Summary
This work addresses the fragmentation in existing runtime verification tools regarding temporal logic support by proposing a unified online monitoring framework. For the first time, the framework integrates multiple temporal logics—including LTL, MTL, and STL—within a single system, while also supporting their robust semantics and first-order quantification extensions. It compiles logical specifications into synchronous dataflow computation graphs, enabling uniform handling of both discrete and dense time semantics. Bandwidth efficiency is achieved through incremental encoding techniques. Implemented as a C++ header-only library with Python bindings, the framework has been validated on embedded systems and autonomous robotic platforms, demonstrating high efficiency and low runtime overhead.

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📝 Abstract
We present Reelay, a unified online temporal logic monitoring framework designed for the rigorous analysis and runtime verification of cyber-physical systems. Reelay addresses the fragmentation of existing logical formalisms and tools by providing a single computational model and interface that supports a broad class of temporal logics. These include Linear Temporal Logic (LTL), Metric Temporal Logic (MTL), and Signal Temporal Logic (STL), along with their extensions for robustness semantics and first-order quantification over unbounded categorical data domains. At its core, Reelay translates temporal logic specifications into executable computation graphs operating as synchronous dataflow systems. This architecture ensures an efficient execution mechanism, making the framework ideal for high-frequency data streams regardless of behavior length. Uniquely, the framework supports both discrete and dense-time semantics, as well as delta-encoded temporal behaviors to minimize bandwidth usage in bandwidth-constrained environments. Reelay is implemented as a header-only C++ library with a high-level Python interface, facilitating integration across a wide range of deployment contexts, from resource-constrained embedded systems to autonomous robotic platforms. We demonstrate the practical applicability of the framework through a representative case study and performance experiments, illustrating how Reelay bridges the gap between expressive formal specifications and efficient runtime verification.
Problem

Research questions and friction points this paper is trying to address.

temporal logic
runtime verification
cyber-physical systems
formal methods
monitoring
Innovation

Methods, ideas, or system contributions that make the work stand out.

online monitoring
temporal logic
synchronous dataflow
delta encoding
runtime verification
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