AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models

2026-08-13

AI Summary

This work addresses the inefficiency and heavy reliance on expert knowledge in analog circuit design, particularly within the nonlinear, high-dimensional search space where existing large language model (LLM) approaches struggle to jointly handle topology generation and sizing optimization. To overcome these limitations, the authors propose AaLLM, an end-to-end multi-agent framework featuring a Designer–Critic–Evaluator triad that integrates retrieval-augmented generation (RAG) with automated knowledge base construction to directly translate user specifications into complete netlists. The approach significantly enhances both innovation and efficiency: generated circuits achieve figures of merit (FoMs) comparable to or exceeding those of human-designed counterparts—by up to threefold—while reducing SPICE simulation calls by 3–4.5× and accelerating overall runtime by 40×.

Abstract

Analog circuit design is a time-consuming, iterative process in a nonlinear and high-dimensional design space that relies heavily on expert intuition. Among recent developments, LLMs have introduced a promising approach by bringing natural language reasoning to circuit design tasks. The majority of conventional LLM-based approaches provide fragmented solutions that focus either only on sizing or topology generation. These methods require adding specific technical knowledge manually, which is inefficient and prone to hallucinations during circuit sizing. Moreover, the inherent trade-off in meeting different specs makes current approaches iterative and tedious. Another shortcoming is the inability to create innovative topologies, which may lead to sub-optimal designs due to reliance on conventional topologies. In this paper, we present AaLLM, an open-source end-to-end multi-agent LLM workflow that takes user specs as input and outputs the appropriate netlist, encompassing both topology generation and circuit sizing. AaLLM automates the creation of a relevant knowledge base from research papers and textbooks to combat tedious manual data collection. A RAG model is implemented to emulate circuit design expertise using this knowledge base. Moreover, AaLLM uses a novel tri-agent feedback system comprising a Designer that determines circuit component values, a Critic that scrutinizes these values, and an Evaluator that minimizes circuit sizing iterations by arbitrating between the other two agents. AaLLM-generated novel topologies achieve a figure of merit (FoM) comparable to that of known topologies, and up to 3x higher for certain circuits. Testing on several circuit topologies, our results show a 3x - 4.5x decrease in the number of SPICE calls at inference when compared to SOTA multi-agent LLM pipelines. The results also show a 40x decrease in wall-clock time compared to existing approaches.

Problem

• analog circuit design
• topology generation
• circuit sizing
• large language models
• design automation

Innovation

• end-to-end analog design
• multi-agent LLM
• topology generation
• circuit sizing
• RAG-based knowledge retrieval