Lonic: Algorithm-Hardware Co-Design for Energy-Efficient Fully Local Online SNN Training with INT4 Precision

2026-08-12

AI Summary

This work addresses the challenge that existing fully local online spiking neural network (SNN) training algorithms struggle to achieve energy efficiency advantages on real hardware. Through algorithm-hardware co-design, it introduces the first integration of INT4 low-precision training with a dedicated architecture, featuring a multiplier-free reconfigurable processing element (PE) array, a dual-optimized zero-gating mechanism, a time-prefix-accelerated local learning dataflow, and low-precision weight-movement techniques. The proposed solution significantly enhances energy efficiency and scalability while maintaining accuracy: it achieves 17.44× and 66.28× higher energy efficiency than Apple M4 and NVIDIA V100, respectively, and outperforms TPU-like ASICs and the H2Learn accelerator by 15.95× in energy efficiency and 7.28× in area efficiency.

Abstract

Spiking neural networks (SNNs) have recently attracted increasing attention as an energy-efficient learning paradigm. Existing works also propose temporally and fully local online SNN training algorithms to address memory and computation overhead. However, they do not consider whether the algorithmic advantages can be effectively translated into real-device efficiency. To address this challenge, we present Lonic, an algorithm-hardware co-design for energy-efficient and scalable fully local online supervised SNN learning. On the algorithm side, we implement an INT4 low-precision training algorithm for fully local online SNN learning while maintaining accuracy. On the hardware side, to leverage the benefits of the proposed algorithm, we introduce reconfigurable multiplier-free integer PE arrays, dual-optimization zero-gating strategy, temporal prefix-accelerated local learning dataflow, and low-precision weight movement to significantly improve training efficiency. Compared to Apple M4 and Nvidia V100 GPUs, Lonic achieves average energy efficiency improvements of 17.44x and 66.28x, respectively, along with speedups of 3.25x and 1.02x, respectively. Moreover, Lonic achieves 15.95x (14.64x) and 1.52x (7.28x) energy efficiency (area efficiency) over ASIC TPU-like and H2Learn accelerators, respectively. The code for Lonic is available at https://github.com/peilin-chen/Lonic.

Problem

• Spiking Neural Networks
• Online Learning
• Energy Efficiency
• Algorithm-Hardware Co-Design
• Low-Precision Training

Innovation

• algorithm-hardware co-design
• INT4 precision
• fully local online learning
• spiking neural networks
• energy-efficient training