Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon

2026-06-24

AI Summary

This work addresses the longstanding limitations in chip design education imposed by proprietary EDA tools, PDKs, and IP blocks, which hinder the development of domain-specific SoC engineers with full-stack practical skills. To overcome this barrier, the authors present the first end-to-end open-source SoC tapeout flow for educational use, built around the highly customizable RISC-V platform Croc. The framework integrates open-source SystemVerilog IP, a 130nm open PDK, and a complete open-source EDA toolchain, enabling multi-dimensional customization—including instruction set extensions, coprocessors, and peripherals. In its inaugural deployment, 65 students completed 33 projects, yielding 30 manufacturable layouts and 5 successful tapeouts. The baseline chip has undergone silicon validation, demonstrating functionality and performance comparable to proprietary solutions, thereby significantly lowering the barrier to SoC design and validating the feasibility of a fully open-source design methodology.

Abstract

The demand for domain-specific systems-on-chip (SoCs) in artificial intelligence, robotics, and automotive systems is increasing the need for engineers with hands-on expertise on very-large-scale integration (VLSI) design from architecture specification to fabricated silicon. Yet, most VLSI courses rely on restrictively licensed electronic design automation tools and process design kits (PDKs), as well as closed-source hardware designs. We present an end-to-end open-source domain-specific SoC design and fabrication flow built around Croc, a highly customizable RISC-V platform. Built from open-source SystemVerilog intellectual property blocks and integrated with an end-to-end open-source design flow in a 130nm open PDK, Croc enables tapeout projects supporting multiple domain customization options: instruction-set extensions, accelerator co-processors, and peripherals. In our first open-source course experience using Croc, 65 students completed 33 projects, 30 of which produced manufacturable layouts. 18 designs were selected as tapeout candidates, and five were fabricated. A first baseline chip has already been successfully characterized in silicon, demonstrating microcontroller-class functionality and implementation metrics comparable to those of products with similar functional complexity completed with closed-source toolchains and PDKs.

Problem

• open-source silicon
• domain-specific SoC
• VLSI education
• tapeout
• RISC-V

Innovation

• open-source silicon
• RISC-V
• domain-specific SoC
• end-to-end design flow
• tapeout education