Programmable Probabilistic Computer with 1,000,000 p-bits

2026-06-23

AI Summary

This work addresses the limitations of on-chip capacity and memory bandwidth by proposing a distributed p-bit architecture based on interconnected FPGAs to construct a million-scale programmable probabilistic computer. By exchanging only single-bit boundary states and employing Gibbs sampling, the system achieves over one trillion spin flips per second. The study reveals, for the first time, a universal scaling law: the ratio η of boundary-refresh to local-update frequency governs the emergence of effective single-machine behavior. A quantitative trade-off between parallelism and solution accuracy is established. Experiments on three-dimensional spin glasses, Max-Cut, and SAT problems demonstrate that when η exceeds a topology-dependent threshold, performance matches that of a monolithic GPU; below this threshold, the system still exhibits power-law convergence, confirming the architecture’s scalability and universality.

Abstract

Probabilistic computers built from p-bits have been proposed as hardware accelerators for sampling and optimizing Ising models, but existing systems have been confined to a single chip, capped by its capacity and memory bandwidth. Here we break this limit by networking FPGAs into a single Ising machine far larger than any one device could hold, realizing a programmable probabilistic computer with one million p-bits. The machine performs Gibbs sampling at over a trillion flips per second while keeping every coupling weight in local on-chip memory. During execution, devices exchange nothing but 1-bit boundary states. This architecture exposes a question fundamental to any distributed sampler: how frequently boundary information must be refreshed for a partitioned machine to behave as an unpartitioned one. Using three-dimensional Edwards-Anderson spin glasses, we show that the answer is set by a single timing ratio, eta = f_comm/f_p-bit, of the boundary-exchange frequency to the local p-bit update frequency. Above a topology-dependent threshold, the distributed machine matches a monolithic GPU reference. Below it, residual energy still decays as a power law but with a reduced exponent, turning parallelism into a quantifiable throughput-accuracy tradeoff. A theoretical cluster mean-field model reproduces the same behavior, showing that this tradeoff is a universal property of partitioned stochastic dynamics. These results provide a programmable million-p-bit platform, demonstrated across spin glasses, Max-Cut, and Boolean satisfiability, together with a quantitative design rule for scaling probabilistic computers beyond the single-chip limit.

Problem

• probabilistic computing
• distributed sampling
• Ising model
• p-bit
• scalability

Innovation

• probabilistic computing
• p-bit
• distributed Ising machine
• Gibbs sampling
• hardware acceleration