FPGA Lifecycle Management for RISC-V Systems

2026-08-13

AI Summary

本文解决了RISC-V系统中FPGA生命周期管理缺乏通用模型的问题，通过利用标准Linux功能提出了一种与主机无关的控制平面架构。

Abstract

FPGA lifecycle management remains tied to proprietary toolchains and host architectures, leaving RISC-V without a vendor-neutral model for scalable bitstream deployment. A host-agnostic control-plane architecture is presented that shifts lifecycle management to the operating-system layer by leveraging standard Linux capabilities, thereby decoupling deployment from specific ISAs and vendor stacks. This enables Linux-capable RISC-V processors to serve as control hosts in heterogeneous FPGA systems. Prototyped on a Zynq-7000 SoC and generalizable to RISC-V platforms, the architecture provides a portable foundation for fleet-scale FPGA management.

Problem

• FPGA
• lifecycle management
• RISC-V
• vendor-neutral
• bitstream deployment

Innovation

• host-agnostic control-plane
• Linux capabilities
• RISC-V processors
• heterogeneous FPGA systems
• portable foundation