A Hybrid-Domain Floating-Point Compute-in-Memory Architecture for Efficient Acceleration of High-Precision Deep Neural Networks

2025-02-11

AI Summary

To address the excessive power consumption of high-precision deep neural networks (DNNs) in digital-only compute-in-memory (CIM) architectures, this work proposes an analog-digital hybrid-domain CIM architecture. The core innovation is the first-of-its-kind co-integration of analog floating-point computation units and digital control logic within a single memory cell, enabling lossless floating-point arithmetic with concurrent optimization of computational accuracy and energy efficiency. Key enablers include area-efficient analog compute units, low-power bit-serial analog-to-digital converters (ADCs), and carefully co-designed hybrid-domain circuits. Circuit-level simulations confirm zero accuracy degradation across mainstream DNN benchmarks, while achieving 3.2×–5.8× higher energy efficiency compared to state-of-the-art digital CIM implementations. This advancement significantly reduces energy consumption for high-precision inference and training at the edge.

Technology Category

• Machine Learning: Deep Neural Architectures and Foundation Models
• Cognitive Modeling & Cognitive Systems: Analogy
• Computer Vision: Learning & Optimization for CV

Application Category

• Economics, Online Markets and Human Computation: Architectures and workflows that use LLMs for crowd work
• Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphs
• Systems and Infrastructure for Web, Mobile and WoT: Energy management for devices in mobile Web and WoT environments

Abstract

Compute-in-memory (CIM) has shown significant potential in efficiently accelerating deep neural networks (DNNs) at the edge, particularly in speeding up quantized models for inference applications. Recently, there has been growing interest in developing floating-point-based CIM macros to improve the accuracy of high-precision DNN models, including both inference and training tasks. Yet, current implementations rely primarily on digital methods, leading to substantial power consumption. This paper introduces a hybrid domain CIM architecture that integrates analog and digital CIM within the same memory cell to efficiently accelerate high-precision DNNs. Specifically, we develop area-efficient circuits and energy-efficient analog-to-digital conversion techniques to realize this architecture. Comprehensive circuit-level simulations reveal the notable energy efficiency and lossless accuracy of the proposed design on benchmarks.

Problem

• Accelerate high-precision DNNs efficiently
• Reduce power consumption in CIM
• Integrate analog and digital CIM methods

Innovation

• Hybrid-domain CIM architecture
• Analog-digital integration
• Energy-efficient conversion techniques