Problem
Research questions and friction points this paper is trying to address.
RRAM
in-memory computing
conductance drift
long-term accuracy
drift resilience
VeRA+: Vector-Based Lightweight Digital Compensation for Drift-Resilient RRAM In-Memory Computing
🤖 AI Summary
This work addresses the severe long-term accuracy degradation in RRAM-based in-memory computing caused by conductance drift. To mitigate this issue, the authors propose VeRA+, a lightweight drift compensation framework that achieves long-term robustness without on-chip retraining, data replay, or online correction. VeRA+ leverages shared projection matrices and introduces only two compact vectors per drift level, reducing storage overhead by over three orders of magnitude. The approach integrates offline drift-aware scheduling and is validated using real-world 1T1R device measurements. Experimental results demonstrate that after simulating ten years of conductance drift, the model retains 99.77% of its original (drift-free) accuracy, closely matching the ideal baseline performance.
📝 Abstract
RRAM-based in-memory computing (IMC) offers high energy efficiency but suffers from conductance drift that severely degrades long-term accuracy. Existing approaches including retraining, noise-aware training, and Batch Normalization (BN)-based calibration either require RRAM rewriting, demand large storage overhead, or rely on online correction. We propose VeRA+, a lightweight drift compensation framework that reuses shared projection matrices and introduces only two compact drift-specific vectors per drift level. A drift-aware scheduling algorithm offline-trains a small set of VeRA+ parameters and selects the appropriate set over time without any on-chip retraining or data replay. VeRA+ preserves up to 99.77% of the drift-free accuracy after ten years of simulated drift and reduces storage overhead by more than three orders of magnitude compared with BN-based calibration. To validate VeRA+ under realistic device behavior, we extract one-week drift statistics from measurements on our fabricated 1T1R RRAM devices and use them to simulate realistic drifted weights. Under these measured drift conditions, VeRA+ achieves accuracy close to the drift-free baseline, providing an efficient and practical solution for long-term drift resilience in RRAM-IMC.
Innovation
Methods, ideas, or system contributions that make the work stand out.
RRAM in-memory computing
conductance drift compensation
lightweight adaptation
drift-aware scheduling
parameter-efficient calibration
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