Scalable Parameter Design for Superconducting Quantum Circuits with Graph Neural Networks

2024-11-25

AI Summary

To address poor scalability and challenging crosstalk suppression in large-scale superconducting quantum circuit parameter design, this paper proposes a graph neural network (GNN)-based “three-level scaling” optimization framework. The method introduces a novel supervised–unsupervised co-training paradigm: a medium-scale circuit is used to supervise the training of an evaluator, while an unsupervised designer generalizes the optimization to large-scale circuits. It is the first approach to jointly optimize single- and two-qubit gate frequencies—modeled as node and edge attributes on a circuit graph, respectively. Evaluated on an 870-qubit circuit, the framework reduces error rates by 49% compared to the state-of-the-art algorithm (achieving a 51% error reduction) and accelerates design time from 90 minutes to 27 seconds. The method achieves high accuracy, ultra-low latency, and strong scalability, establishing a new paradigm for automated superconducting quantum chip design.

Technology Category

• Machine Learning: Quantum Machine Learning
• Search and Optimization: Learning to Search
• Constraint Satisfaction and Optimization: Satisfiability

Application Category

• Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphs
• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines
• Security and Privacy: Large-scale security measurements

Abstract

To demonstrate supremacy of quantum computing, increasingly large-scale superconducting quantum computing chips are being designed and fabricated. However, the complexity of simulating quantum systems poses a significant challenge to computer-aided design of quantum chips, especially for large-scale chips. Harnessing the scalability of graph neural networks (GNNs), we here propose a parameter designing algorithm for large-scale superconducting quantum circuits. The algorithm depends on the so-called 'three-stair scaling' mechanism, which comprises two neural-network models: an evaluator supervisedly trained on small-scale circuits for applying to medium-scale circuits, and a designer unsupervisedly trained on medium-scale circuits for applying to large-scale ones. We demonstrate our algorithm in mitigating quantum crosstalk errors. Frequencies for both single- and two-qubit gates (corresponding to the parameters of nodes and edges) are considered simultaneously. Numerical results indicate that the well-trained designer achieves notable advantages in efficiency, effectiveness, and scalability. For example, for large-scale superconducting quantum circuits consisting of around 870 qubits, our GNNs-based algorithm achieves 51% of the errors produced by the state-of-the-art algorithm, with a time reduction from 90 min to 27 sec. Overall, a better-performing and more scalable algorithm for designing parameters of superconducting quantum chips is proposed, which initially demonstrates the advantages of applying GNNs in superconducting quantum chips.

Problem

• Designing scalable superconducting quantum circuits
• Mitigating quantum crosstalk errors efficiently
• Enhancing parameter design with graph neural networks

Innovation

• Graph Neural Networks
• Three-stair scaling mechanism
• Mitigate quantum crosstalk errors