Croc: An End-to-End Open-Source Extensible RISC-V MCU Platform to Democratize Silicon

2025-02-07

AI Summary

To address the critical shortage of chip design talent and the misalignment between academia and industry, this paper introduces the first end-to-end open-source RISC-V microcontroller platform explicitly designed for teaching and innovation. Built upon the CVE2 dual-core implementation supporting the RV32I(EMC) instruction set, the platform enables students to define custom ISA extensions. It integrates an open-source EDA toolchain, the IHP 130 nm open-process node, and an OS synthesis flow—spanning RTL design, synthesis, place-and-route, and tapeout. Its novel, extensible, education-oriented architecture allowed two students to complete the fabrication and functional validation of the MLEM chip within eight weeks. Deployed in ETH Zurich’s VLSI course in Spring 2025, it enabled 80 students to perform 40 ASIC floorplans and 5 SoC tapeouts. The accompanying textbook is openly licensed under the Creative Commons (CC) protocol.

Technology Category

• Machine Learning: Hardware-aware ML
• Computer Vision: Learning & Optimization for CV
• Cognitive Modeling & Cognitive Systems: (Computational) Cognitive Architectures

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Experiences and lessons learnt from Web-based algorithms and system deployments
• Responsible Web: Data and user privacy-enhancing technologies for the Web
• Economics, Online Markets and Human Computation: Economics and fairness of platforms and recommendation systems

Abstract

Ensuring a continuous and growing influx of skilled chip designers and a smooth path from education to innovation are key goals for several national and international"Chips Acts". Silicon democratization can greatly benefit from end-to-end (from silicon technology to software) free and open-source (OS) platforms. We present Croc, an extensible RISC-V microcontroller platform explicitly targeted at hands-on teaching and innovation. Croc features a streamlined OS synthesis and an end-to-end OS implementation flow, ensuring full, unconstrained access to the design, the design automation tools, and the implementation technology. Croc uses the industry-proven, open-source CVE2 core, implementing the RV32I(EMC) instruction set architecture (ISA), enabling students to define and implement their own ISA extensions. MLEM, a tapeout of Croc in IHP's open 130 nm node completed in eight weeks by a team of just two students, demonstrates the platform's viability for hands-on teaching in schools, universities, or even on a self-education path. In spring 2025, ETH Zurich will utilize Croc for its curricular VLSI class, involving up to 80 students, producing up to 40 OS application-specific integrated circuit layouts, and completing up to five student-led system-on-chip tapeouts. The lecture notes and exercises are already available under a Creative Commons license.

Problem

• Democratize silicon with open-source RISC-V platform
• Enable hands-on teaching and innovation in chip design
• Facilitate seamless education-to-innovation transition in VLSI

Innovation

• Extensible RISC-V microcontroller platform
• End-to-end open-source implementation flow
• Industry-proven open-source CVE2 core