SAHM: State-Aware Heterogeneous Multicore for Single-Thread Performance

2025-09-26

AI Summary

Facing diminishing returns in single-thread performance scaling on modern processors, this paper proposes a runtime behavior-aware heterogeneous multicore architecture. Methodologically, it introduces (1) the first fine-grained taxonomy of 16 microarchitectural behavioral states, identified lightweightly at runtime via hardware performance counters; (2) composable domain-specific core templates enabling dynamic, state-matched thread scheduling; and (3) a low-overhead thread migration mechanism balancing efficiency and robustness. Evaluation on realistic workloads demonstrates an average speedup of 17% over conventional homogeneous designs, while maintaining strong robustness—even under high-migration-cost scenarios, performance degradation remains below 1%. This work establishes a novel paradigm for overcoming single-thread performance bottlenecks through adaptive, behavior-driven hardware-software co-design.

Technology Category

• Machine Learning: Hardware-aware ML
• Humans and AI: Human-Aware Planning and Behavior Prediction
• Cognitive Modeling & Cognitive Systems: Adaptive Behavior

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Web performance, measurement, and characterization
• Security and Privacy: Large-scale security measurements
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems

Abstract

Improving single-thread performance remains a critical challenge in modern processor design, as conventional approaches such as deeper speculation, wider pipelines, and complex out-of-order execution face diminishing returns. This work introduces SAHM-State-Aware Heterogeneous Multicore-a novel architecture that targets performance gains by exploiting fine-grained, time-varying behavioral diversity in single-threaded workloads. Through empirical characterization of performance counter data, we define 16 distinct behavioral states representing different microarchitectural demands. Rather than over-provisioning a monolithic core with all optimizations, SAHM uses a set of specialized cores tailored to specific states and migrates threads at runtime based on detected behavior. This design enables composable microarchitectural enhancements without incurring prohibitive area, power, or complexity costs. We evaluate SAHM in both single-threaded and multiprogrammed scenarios, demonstrating its ability to maintain core utilization while improving overall performance through intelligent state-driven scheduling. Experimental results show opportunity for 17% speed up in realistic scenarios. These speed ups are robust against high-cost migration, decreasing by less than 1%. Overall, state-aware core specialization is a new path forward for enhancing single-thread performance.

Problem

• Improving single-thread performance in modern processors
• Exploiting fine-grained behavioral diversity in workloads
• Enabling composable microarchitectural enhancements cost-effectively

Innovation

• State-aware heterogeneous multicore architecture
• Specialized cores tailored to behavioral states
• Runtime thread migration based on detected behavior