🤖 AI Summary
This work addresses the inefficiency of forward and backward propagation in shallow neural networks on GPUs, which stems from memory access bottlenecks. To mitigate this issue, the authors propose a three-tier CUDA-based optimization strategy that integrates tiled shared-memory padding, pre-transposition of weight matrices, and fusion of matrix multiplication (MatMul) with ReLU activation operators. By enhancing memory access patterns, minimizing global memory round trips, and increasing computational density, the approach achieves a 1.41× speedup on an NVIDIA Tesla T4 GPU—reducing execution time from 21.0 seconds to 14.8 seconds. The optimized implementation significantly outperforms both serial CPU and OpenMP-parallelized baselines, demonstrating the effectiveness of the proposed techniques in accelerating training for shallow neural networks.
📝 Abstract
We present a comparative study of CUDA optimization strategies applied to forward and backward propagation in a shallow neural network. Three stacked optimizations are evaluated: (1) tiled shared memory with bank-conflict elimination via +1-column padding, (2) pre-transposed weight matrices for coalesced global memory access, and (3) a fused MatMul+ReLU kernel that eliminates intermediate global-memory round-trips. Experiments on an NVIDIA Tesla T4 (CUDA 13.0) across three dataset sizes show that the fully optimized implementation achieves a 1.41x speedup over the baseline CUDA version on the large dataset (25,600 samples), reducing execution time from 21.0s to 14.8s. Results are compared against a sequential CPU baseline and an OpenMP parallel implementation, demonstrating the effectiveness of memory-access optimization in GPU-accelerated deep learning primitives.