🤖 AI Summary
Conventional AI systems face critical bottlenecks in memory access, data movement, and energy efficiency—particularly prohibitive for low-power neuromorphic computing at the edge.
Method: This work proposes a resistive random-access memory (RRAM)-based analog content-addressable memory (ACAM) tailored for edge neuromorphic applications. We introduce a novel 9T4R pixel cell enabling high-precision analog template matching and implement, for the first time, a tunable, ultra-low-power ACAM system using a hybrid 180 nm commercial CMOS and custom RRAM process. Key innovations include in-memory analog-domain computation, voltage-domain matching discrimination, and co-optimized array architecture.
Results: The fabricated chip achieves per-pixel match/mismatch energy consumption of only 0.16 pJ / 0.036 pJ (at 3 V, 66 MHz). Experimental validation confirms significantly superior energy efficiency over digital alternatives, establishing a new high-efficiency neuromorphic classification paradigm for edge intelligence.
📝 Abstract
The continuous shift of computational bottlenecks to the memory access and data transfer, especially for AI applications, poses the urgent needs of re-engineering the computer architecture fundamentals. Many edge computing applications, like wearable and implantable medical devices, introduce increasingly more challenges to conventional computing systems due to the strict requirements of area and power at the edge. Emerging technologies, like Resistive RAM (RRAM), have shown a promising momentum in developing neuro-inspired analogue computing paradigms capable of achieving high classification capabilities alongside high energy efficiency. In this work, we present a novel RRAM-based Analogue Content Addressable Memory (ACAM) for on-line analogue template matching applications. This ACAM-based template matching architecture aims to achieve energy-efficient classification where low energy is of utmost importance. We are showcasing a highly tuneable novel RRAM-based ACAM pixel implemented using a commercial 180nm CMOS technology and in-house RRAM technology and exhibiting low energy dissipation of approximately 0.036pJ and 0.16pJ for mismatch and match, respectively, at 66MHz with 3V voltage supply. A proof-of-concept system-level implementation based on this novel pixel design is also implemented in 180nm.