Problem
Research questions and friction points this paper is trying to address.
High-Level Synthesis
Memory Conflict Detection
Non-affine Arithmetic
Separation Logic
Structural Safety
Separation Logic for Memory Conflict Detection in High-Level Synthesis
🤖 AI Summary
This work addresses the challenge of precisely detecting memory access conflicts caused by non-affine array indices in high-level synthesis, a problem where traditional polyhedral methods often yield overly conservative results, leading to unnecessary serialization. The paper introduces separation logic into this domain for the first time, constructing a spatial verification framework at the LLVM IR level. By extracting flat arithmetic expressions from getelementptr instructions, it models memory banks as polymorphic spatial predicates and defines conflict-free expansion conditions via separating conjunction. Concurrency mutual exclusion is thereby encoded as a system of inequalities over SSA variables, which is then verified by an SMT solver. The approach enables precise concurrent analysis under non-affine indexing, avoids excessive serialization, provides a deterministic fallback when verification is undecidable, and formally guarantees that the generated RTL contains no structural memory conflicts.
📝 Abstract
High-Level Synthesis leverages loop unrolling and array partitioning, but scheduling concurrent accesses is challenging when indices contain non-affine arithmetic. Conventional polyhedral frameworks systematically over-approximate these non-linear transformations, forcing conservative serialization that degrades performance. To minimize this bottleneck, we present a spatial verification framework operating at the LLVM Intermediate Representation (IR) level. By extracting flat arithmetic expressions from "getelementptr" instructions, it models memory banks as polymorphic spatial predicates to handle non-affine terms. Structural safety is enforced via a Conflict-Free Unrolling condition using Separation Logic's separating conjunction; concurrent operations targeting the same bank trigger an automatic spatial contradiction. This disjointness requirement is reduced to a matrix of pairwise inequalities over immutable Static Single Assignment (SSA) variables for a Satisfiability Modulo Theories (SMT) oracle. To guarantee safety against undecidable non-linear arithmetic, we implement a deterministic sequential fallback. Finally, a theorem of soundness bridges algebraic SMT verification with Register Transfer Level trace safety, ensuring physical hardware immune to structural memory collisions.
Innovation
Methods, ideas, or system contributions that make the work stand out.
Separation Logic
High-Level Synthesis
Memory Conflict Detection
SMT Verification
Non-affine Indexing
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