π€ AI Summary
This work addresses the inefficacy of conventional error-correcting codes (ECCs) in STT-MRAM caches, where data-dependent error patterns significantly exacerbate failure rates. To overcome the limitations of traditional ECCs under spatially and temporally correlated errors, the authors propose ROBINβa novel incremental diagonal-interleaved ECC architecture. ROBIN leverages insights into the data dependency characteristics of error patterns to tailor its encoding structure, thereby transcending the error-correction constraints of conventional schemes. Experimental results demonstrate that ROBIN reduces cache error rates by an average of 28.6Γ with low overhead, effectively neutralizing the 151.7% error rate increase induced by data-dependent effects and substantially enhancing cache reliability.
π Abstract
Spin-Transfer Torque Magnetic RAM (STT-MRAM) is a promising alternative for SRAMs in on-chip cache memories. Besides all its advantages, high error rate in STT-MRAM is a major limiting factor for on-chip cache memories. In this paper, we first present a comprehensive analysis that reveals that the conventional Error-Correcting Codes (ECCs) lose their efficiency due to data-dependent error patterns, and then propose an efficient ECC configuration, so-called ROBIN, to improve the correction capability. The evaluations show that the inefficiency of conventional ECC increases the cache error rate by an average of 151.7% while ROBIN reduces this value by more than 28.6x.