Modular Compilation for Quantum Chiplet Architectures

2025-01-14

AI Summary

Modular quantum computers—particularly multi-chip heterogeneous architectures—face critical challenges including non-universal inter-chip connectivity, complex qubit mapping and routing, and low compilation efficiency. Method: This paper proposes SEQC, a chip-aware end-to-end parallel compilation framework. It introduces the first qubit allocation, routing, and optimization strategies tailored to non-universal gate sets across chips, integrating graph partitioning, heuristic SWAP scheduling, gate-level fidelity-aware synthesis, and multi-stage parallel optimization. Contribution/Results: SEQC achieves the first fully chip-aware parallel compilation pipeline. Experiments demonstrate an average circuit fidelity improvement of 36%, a 1.92× speedup in execution time, and a stable 2–4× acceleration in compilation solving time over the chip-aware Qiskit baseline. These advances significantly enhance the practicality of large-scale modular quantum computing.

Technology Category

• Machine Learning: Quantum Machine Learning
• Search and Optimization: Learning to Search
• Computer Vision: Multi-modal Vision

Application Category

• Security and Privacy: Large-scale security measurements
• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems

Abstract

As quantum computing technology continues to mature, industry is adopting modular quantum architectures to keep quantum scaling on the projected path and meet performance targets. However, the complexity of chiplet-based quantum devices, coupled with their growing size, presents an imminent scalability challenge for quantum compilation. Contemporary compilation methods are not well-suited to chiplet architectures. In particular, existing qubit allocation methods are often unable to contend with inter-chiplet links, which don't necessary support a universal basis gate set. Furthermore, existing methods of logical-to-physical qubit placement, swap insertion (routing), unitary synthesis, and/or optimization are typically not designed for qubit links of wildly varying levels of duration or fidelity. In this work, we propose SEQC, a complete and parallelized compilation pipeline optimized for chiplet-based quantum computers, including several novel methods for qubit placement, qubit routing, and circuit optimization. SEQC attains up to a 36% increase in circuit fidelity, accompanied by execution time improvements of up to 1.92x. Additionally, owning to its ability to parallelize compilation, SEQC achieves consistent solve time improvements of 2-4x over a chiplet-aware Qiskit baseline.

Problem

• Quantum Computing
• Modular Design
• Programming Methodology

Innovation

• Quantum Circuit Optimization
• Parallel Processing
• Fidelity Enhancement