Toward Intelligent Prefetching: A Survey on Complex Memory Access Prediction Techniques

📅 2026-06-08
📈 Citations: 0
Influential: 0
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🤖 AI Summary
This work addresses the growing performance gap between processors and memory caused by irregular, data-dependent memory access patterns in modern applications, which render traditional prefetchers ineffective. The paper proposes the first three-dimensional structured taxonomy that integrates locality type, implementation level, and machine learning (ML) paradigm to systematically survey and multidimensionally compare ML-based prefetching techniques. Guided by the PRISMA framework for literature selection, the study encompasses supervised, unsupervised, and reinforcement learning approaches, analyzing software, hardware, and hybrid architectures under both online and offline training regimes. It reveals key relationships—such as those between model class and the accuracy-overhead Pareto frontier, model complexity and cache hierarchy placement, and runtime adaptability versus model capacity—and delineates performance boundaries of ML prefetchers in terms of storage overhead, latency, generalization capability, and hardware feasibility, thereby offering theoretical guidance for intelligent prefetcher design.
📝 Abstract
Data prefetching is a critical technique for bridging the processor-memory performance gap by predicting future memory accesses and retrieving data into on-chip caches before demand. While traditional prefetchers based on next-line, stride, and correlation heuristics perform well for regular access patterns, they are fundamentally inadequate for the irregular, data-dependent patterns prevalent in modern workloads such as graph analytics, sparse matrix computations, and pointer-intensive applications. This survey presents a systematic review of papers using a PRISMA-guided selection methodology. We propose a structured taxonomy that organizes prefetching techniques across three dimensions: locality type, including spatial and temporal locality; implementation layer, including hardware, software, and hybrid approaches; and, for the increasingly important class of ML-based prefetchers, learning paradigm, including supervised, reinforcement, and unsupervised learning, paired with training mode, including online and offline training. Through a multi-dimensional comparative analysis of ML-based prefetchers evaluated across storage overhead, accuracy, inference latency, hardware feasibility, and generalization ability, we identify three key findings: an accuracy-overhead Pareto frontier defined by model class, a natural architectural mapping between model complexity and cache hierarchy level, and a fundamental tension between runtime adaptability and model capacity that motivates hierarchical ensemble architectures.
Problem

Research questions and friction points this paper is trying to address.

memory prefetching
irregular memory access
data-dependent patterns
processor-memory gap
complex workloads
Innovation

Methods, ideas, or system contributions that make the work stand out.

memory prefetching
machine learning
cache hierarchy
PRISMA-guided survey
hierarchical ensemble
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S
Sheel Sindhu Manohar
Shiv Nadar IoE, India