Lifetime-Aware Design of Item-Level Intelligence
🤖 AI Summary
Disposable electronics—such as food packaging and medical patches—exhibit lifespan variations up to 1,000×, posing severe challenges for carbon footprint optimization at trillion-unit deployment scales. Method: This paper introduces FlexiFlow, the first sustainable computing architecture framework incorporating lifecycle-aware design. It (1) develops FlexiBits—a configurable RISC-V core supporting 1-/4-/8-bit datapaths—tailored to kHz-scale flexible electronics fabrication and sub-kilo-gate hardware constraints; (2) establishes FlexiBench, a representative workload suite, alongside an open-source toolchain compatible with flexible-electronics PDKs; and (3) introduces a unified modeling framework jointly accounting for embodied and operational carbon emissions. Results: At 30.9 kHz operation, microarchitectural optimizations reduce carbon footprint by 1.62×; algorithm–hardware co-optimization achieves an additional 14.5× reduction; peak energy efficiency improves by up to 3.5×; and the first open-source tapeout using flexible-electronics process technology is successfully demonstrated.
Application Category
📝 Abstract
We present FlexiFlow, a lifetime-aware design framework for item-level intelligence (ILI) where computation is integrated directly into disposable products like food packaging and medical patches. Our framework leverages natively flexible electronics which offer significantly lower costs than silicon but are limited to kHz speeds and several thousands of gates. Our insight is that unlike traditional computing with more uniform deployment patterns, ILI applications exhibit 1000X variation in operational lifetime, fundamentally changing optimal architectural design decisions when considering trillion-item deployment scales. To enable holistic design and optimization, we model the trade-offs between embodied carbon footprint and operational carbon footprint based on application-specific lifetimes. The framework includes: (1) FlexiBench, a workload suite targeting sustainability applications from spoilage detection to health monitoring; (2) FlexiBits, area-optimized RISC-V cores with 1/4/8-bit datapaths achieving 2.65X to 3.50X better energy efficiency per workload execution; and (3) a carbon-aware model that selects optimal architectures based on deployment characteristics. We show that lifetime-aware microarchitectural design can reduce carbon footprint by 1.62X, while algorithmic decisions can reduce carbon footprint by 14.5X. We validate our approach through the first tape-out using a PDK for flexible electronics with fully open-source tools, achieving 30.9kHz operation. FlexiFlow enables exploration of computing at the Extreme Edge where conventional design methodologies must be reevaluated to account for new constraints and considerations.
Problem
Research questions and friction points this paper is trying to address.
Designing sustainable item-level intelligence for disposable products
Optimizing carbon footprint trade-offs in flexible electronics
Addressing lifetime variation in trillion-scale IoT deployments
Innovation
Methods, ideas, or system contributions that make the work stand out.
Flexible electronics for low-cost item-level intelligence
Lifetime-aware carbon footprint optimization model
Area-optimized RISC-V cores with multi-bit datapaths
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2024-02-08Citations: 0
