Continuous-time nonlinear closed-loop in-memory computing for high-accuracy massive MIMO detection

2026-07-02

AI Summary

This work addresses the challenge of efficiently solving high-precision, large-scale MIMO nonlinear optimization problems using conventional in-memory computing approaches. The authors propose a continuous-time, nonlinear closed-loop in-memory computing architecture that embeds the bounded-constraint zero-forcing decoding problem into a nonlinear feedback dynamical system composed of memristor arrays and current-limiting operational amplifiers, enabling direct solution via physical evolution. This represents the first extension of closed-loop in-memory computing from steady-state linear algebra to continuous-time nonlinear optimization. A mixed-precision iterative refinement method tailored to this system is introduced, supporting high-order modulation schemes such as 256-QAM. Experimental validation on a fabricated chip demonstrates correct dynamic behavior under hardware non-idealities in a 16×16 MIMO system, achieving scalable performance ranging from ultra-low-power approximate to high-accuracy detection.

Abstract

Analog in-memory computing (IMC) has emerged as a promising approach for accelerating matrix operations by exploiting the intrinsic physics of memory arrays. To date, however, most IMC architectures have focused on linear algebra workloads in which computation is encoded in the equilibrium state of a physical system. Extending these principles to nonlinear optimization remains challenging and typically relies on iterative algorithms composed of repeated linear operations. Here, we introduce a continuous-time nonlinear closed-loop IMC architecture for box-constrained zero-forcing (BCZF) decoding in massive multiple-input multiple-output (MIMO) systems. The proposed architecture embeds the decoding problem directly within the dynamics of a nonlinear feedback network of memory arrays and supply-limited operational amplifiers, allowing solutions to emerge through continuous-time physical optimization. We derive a compact analytical model of the circuit and show that its trajectories minimize an equivalent energy function. Experimental emulation using a fabricated IMC chip confirms the predicted dynamics under realistic hardware nonidealities for up to 16x16 MIMO systems. To overcome the finite precision of analog hardware, we extend mixed-precision iterative refinement from linear algebra to nonlinear continuous-time optimization, enabling reliable detection of high-order modulation formats including 256-QAM. Benchmark projections indicate operation from ultra-low-energy approximate decoding to high-accuracy massive MIMO detection. Together, these results extend closed-loop IMC from equilibrium-based linear algebra to continuous-time nonlinear optimization and establish a pathway toward efficient physical accelerators for high-accuracy wireless communications.

Problem

• in-memory computing
• massive MIMO detection
• nonlinear optimization
• continuous-time systems
• analog hardware

Innovation

• in-memory computing
• nonlinear optimization
• continuous-time dynamics
• massive MIMO detection
• mixed-precision refinement