A Constant-Time Implementation Methodology for Activation Functions on Microcontrollers

📅 2026-05-21
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🤖 AI Summary
This work addresses the vulnerability of embedded neural network inference to timing side-channel leakage caused by non-constant-time activation functions. It presents the first generic constant-time framework for implementing activation functions, integrating branchless selection, fixed-overhead Padé rational approximation, dummy arithmetic operations, and instruction-level cycle alignment. The framework efficiently realizes ReLU, Sigmoid, Tanh, GELU, and Swish on the ARM Cortex-M4 microcontroller, achieving three-function and five-function evaluations in 88 and 108 clock cycles, respectively. The implementation maintains high numerical accuracy while guaranteeing strict timing uniformity. Furthermore, the study demonstrates that conventional desynchronization-based countermeasures remain susceptible to template attacks, highlighting the necessity of truly constant-time designs for secure embedded inference.
📝 Abstract
Embedded neural-network inference can leak information through timing side channels, including leakage caused by the evaluation of activation functions. This work proposes a constant-time implementation methodology for activation functions on embedded microcontrollers and validates it on ReLU, sigmoid, tanh, GELU, and Swish on an ARM Cortex-M4 platform. The proposed methodology combines branchless selection, fixed-cost Padé-based approximation, dummy arithmetic where needed, and cycle alignment to obtain timing-regular activation-function implementations. As motivation, we also evaluate a desynchronization-based countermeasure and show that it remains vulnerable to a template-based timing attack. Experimental results show that the resulting protected implementations achieve identical cycle counts for all tested inputs, including (88) cycles in the three-function setting and (108) cycles in the five-function setting. At the same time, the numerical-error analysis indicates that the approximated nonlinear functions retain high accuracy. These results suggest that the proposed methodology provides a practical basis for constructing side-channel-resistant activation functions in embedded inference.
Problem

Research questions and friction points this paper is trying to address.

timing side channels
activation functions
embedded neural-network inference
microcontrollers
side-channel resistance
Innovation

Methods, ideas, or system contributions that make the work stand out.

constant-time implementation
timing side-channel resistance
activation functions
embedded neural networks
Padé approximation
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