Hypergraph Partitioning on GPU with Distinct Incident Hyperedges and Size Constraints

2026-05-19

AI Summary

This work addresses the NP-hard problem of large-scale hypergraph partitioning under constraints of bounded block sizes and the uniqueness of incident hyperedges per block. The authors propose an efficient GPU-accelerated multilevel partitioning algorithm that explicitly constructs incidence structures and neighborhood information to enable batch computation of vertex-pair gains in shared memory. By integrating path- and cycle-based move chains with parallel reduction for validating moves, the method innovatively leverages the hierarchical parallelism of GPUs while respecting problem-specific constraints. A linear-span kernel is designed to support k-way balanced partitioning with negligible overhead. Experimental results demonstrate an average speedup of 380× over state-of-the-art serial multilevel partitioners, along with 1.2–2.0× lower connectivity. For k=2, the approach achieves a 5× speedup over CPU-based methods with only ~5% quality degradation, significantly outperforming existing GPU partitioners.

Abstract

Hypergraph partitioning is a recurring NP-hard problem in engineering; its efficient solution at scale hinges on parallelism. This work proposes a GPU-centric algorithm for multi-level hypergraph partitioning aimed at a specific set of problem constraints: limited size and distinct inbound hyperedges per partition. Manipulating hypergraphs requires deeply nested traversals and concurrent decision-making; our constraints impose further set operations amidst that. In turn, we design algorithms around the GPU's hierarchical parallelism and our problem's specifics. When forming partitions, we materialize the hypergraph's incidence structure and unique neighborhoods in memory to exploit set sparsity and batch node-pairing scores in shared memory. Upon refining partitions, we chain node moves into improving paths and cycles, checking their validity via cumulative set size variations reduced in parallel over moves. Thus, our dominant kernels exhibit a span linear in local hypergraph parameters. Results show an average 380x speedup and a 1.2-2.0x reduction in connectivity compared to a sequential multi-level partitioner. With minor changes, we also support k-way balanced partitioning, running 5x faster than CPU methods with a ~5% quality loss for k=2, outperforming an existing GPU partitioner at comparable runtime, with no measurable overhead from the added constraints handling logic.

Problem

• hypergraph partitioning
• size constraints
• distinct incident hyperedges
• GPU acceleration
• NP-hard problem

Innovation

• GPU-accelerated hypergraph partitioning
• distinct incident hyperedges
• size-constrained partitioning
• parallel set operations
• multi-level refinement