FusionCell: Cross-Attentive Fusion of Layout Geometry and Netlist Topology for Standard-Cell Performance Prediction

2026-05-19

AI Summary

This work addresses the challenge of standard cell performance prediction, which traditionally relies on time-consuming simulations, while existing fast methods often neglect layout geometry and thus fail to capture layout-dependent and coupling effects. To overcome this limitation, the authors propose FusionCell, the first framework that jointly models routing layout geometry and netlist topology. FusionCell employs a DeiT encoder to process three-layer metal routing images and a graph Transformer to represent heterogeneous circuit graphs, integrating them through a topology-guided cross-attention mechanism that dynamically queries relevant physical regions using the netlist as a “map” for synergistic geometric–topological reasoning. Evaluated on a newly constructed dataset of 19.5k cells in 7nm ASAP7 technology, FusionCell achieves an average MAPE of 0.92% in delay and power prediction—significantly outperforming baselines—and offers inference speeds orders of magnitude faster than conventional simulation.

Abstract

Standard cells form the building blocks of digital circuits, so their delay and power critically influence chip-level performance; yet characterization still relies on slow simulation sweeps, and many fast predictors ignore layout geometry, missing coupling and layout-dependent effects. The challenge is to jointly represent layout geometry and netlist topology so models capture fine-grained spatial details together with structural connectivity for accurate performance prediction. We introduce FusionCell, a dual-modality predictor that treats routed layout geometry and netlist topology as inputs and fuses them explicitly in a unified model. A DeiT encoder processes three-layer routed layouts, while a graph transformer models heterogeneous device/net graphs. The modalities are integrated through a topology-guided mechanism, where the netlist acts as a structural "map" to actively query relevant physical regions in the layout for joint geometric and topological reasoning. We build a 7nm dataset based on the ASAP7 PDK with over 19.5k cells spanning 149 types using automatic tools, targeting six metrics: signal rise/fall delay, transition, and power. Experimental results demonstrate that FusionCell reduces regression error, with an average MAPE of 0.92 percent, and improves Spearman/Kendall ranking over baselines, while accelerating the characterization process by orders of magnitude compared to circuit simulation.

Problem

• standard-cell
• performance prediction
• layout geometry
• netlist topology
• delay and power

Innovation

• cross-attentive fusion
• layout geometry
• netlist topology
• standard-cell characterization
• graph transformer