Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges

2025-08-26

AI Summary

To address insufficient protection against side-channel attacks, hardware Trojans, IP piracy, and untrusted manufacturing in 2.5D/3D integration technologies, this work proposes a system-level hardware security paradigm tailored for three-dimensional integrated circuits (3D ICs). Methodologically, it leverages 3D stacking to achieve physical-layer side-channel shielding; employs active interposers to enable secure split manufacturing; implements reconfigurable circuit camouflaging directly on monolithic 3D ICs; and constructs a PIM-capable secure 3D processing architecture. The proposed framework significantly enhances robustness against hardware Trojans and side-channel attacks, strengthens IP protection, and improves manufacturing trustworthiness. It further uncovers novel pathways by which 3D integration can inherently advance hardware security, while identifying key technical challenges—including thermal management, inter-tier communication security, and testability—associated with realizing such security-aware 3D designs.

Technology Category

• Machine Learning: Hardware-aware ML
• Computer Vision: 3D Computer Vision
• Application Domains: Security

Application Category

• Security and Privacy: Large-scale security measurements
• User Modeling, Personalization and Recommendation: Attacks and countermeasures in recommendation systems
• Systems and Infrastructure for Web, Mobile and WoT: Sustainability and carbon-aware systems for Web, mobile, and WoT

Abstract

3D die stacking and 2.5D interposer design are promising technologies to improve integration density, performance and cost. Current approaches face serious issues in dealing with emerging security challenges such as side channel attacks, hardware trojans, secure IC manufacturing and IP piracy. By utilizing intrinsic characteristics of 2.5D and 3D technologies, we propose novel opportunities in designing secure systems. We present: (i) a 3D architecture for shielding side-channel information; (ii) split fabrication using active interposers; (iii) circuit camouflage on monolithic 3D IC, and (iv) 3D IC-based security processing-in-memory (PIM). Advantages and challenges of these designs are discussed, showing that the new designs can improve existing countermeasures against security threats and further provide new security features.

Problem

• Addressing hardware security challenges in 3D/2.5D integrated circuits
• Developing countermeasures against side-channel attacks and IP piracy
• Proposing secure manufacturing techniques using 3D technologies

Innovation

• 3D architecture for shielding side-channel information
• Split fabrication using active interposers
• Circuit camouflage on monolithic 3D IC