🤖 AI Summary
This work addresses the computational bottleneck in principal component analysis (PCA)—particularly in matrix multiplication and singular value decomposition (SVD)—which hinders performance in applications such as hyperspectral imaging and genomics due to limitations in existing hardware regarding uniformity, scalability, and energy efficiency. To overcome this, the authors propose MANOJAVAM, a unified and scalable FPGA-based accelerator architecture that, for the first time, integrates both matrix multiplication and SVD within a single structure. Leveraging tiled streaming processing, a parallel Jacobi algorithm, a T×T systolic array, CORDIC-based pipelined rotation units, and a mode-aware two-level cache, MANOJAVAM supports arbitrary input dimensions. Implemented on a Virtex Ultrascale+ FPGA at 434 MHz, it achieves up to 22.75× lower SVD latency and 42.14× better energy efficiency compared to an NVIDIA A6000 GPU, making it suitable for both high-performance and edge computing scenarios.
📝 Abstract
Principal Component Analysis (PCA) is widely used for dimensionality reduction in hyperspectral imaging, genomics, and neurosciences. However, it suffers from computational bottlenecks in matrix multiplication and singular value decomposition (SVD). Prior PCA hardware accelerators either target only one of these stages, rely on High Level Synthesis (HLS) that limits microarchitectural optimizations or use fixed point datapaths with limited dataset scalability. There is a need for a unified PCA accelerator that is suitable for datasets of any input dimension. Hence, the proposed work presents MANOJAVAM, a scalable PCA accelerator fabric, unifying matrix multiplication and SVD in a single architecture. MANOJAVAM(T,S) comprises an S number of TxT TPU-style systolic arrays employing block streaming for high-throughput matrix multiplication. It further integrates a highly parallel Jacobian unit implementing the Jacobi method for SVD with pipelined CORDIC based rotations. A two tier cache hierarchy and mode-aware memory policies adapts to the distinct memory access patterns of covariance matrix and rotation computation. For demonstration, MANOJAVAM(4,8) is realized on a Xilinx Artix-7 FPGA, achieving a frequency of 200 MHz at 1.271W. MANOJAVAM(16,32) is realized on Xilinx Virtex-Ultrascale+ FPGA, achieving a frequency of 434 MHz at 16.957W. Benchmarking on real-world datasets reveals that MANOJAVAM(16,32) achieves up to a 22.75x speedup in SVD latency and a 42.14x reduction in total energy consumption compared to a high-performance NVIDIA A6000 GPU. The architecture offers a unified, scalable, and energy-efficient platform for large-scale data analytics in both high-performance and edge-computing environments.