Problem
Research questions and friction points this paper is trying to address.
RISC-V
High-Performance-Computing
Benchmarking
Vector-Extension
Great Expectations: Benchmarking the Real-World Performance of RVV 1.0 in HPC
🤖 AI Summary
本文通过基准测试评估了RVV 1.0在高性能计算中的实际性能，使用了多种标准HPC基准和合成工作负载，并与ARM64芯片进行了对比。
📝 Abstract
Following the ratification of the RISC-V Vector Extension (RVV 1.0), new commercially available silicon has been adopting the extension. This paper revisits the question of RISC-V viability for High-Performance-Computing (HPC) by benchmarking the latest RVV 1.0-capable hardware (SiFive X280 (Tenstorrent Blackhole), SpacemiT X60 (K1) and X100/A100 (K3), and T-Head C920v2 (Sophon SG2044)). We assess these platforms using standard HPC benchmarks (BLAS, FFTW, HPL, HPCG) and synthetic workloads (STREAM, FMA throughput) and compare them to a state-of-the-art HPC ARM64 chip (NVIDIA Grace). Our findings show that while RVV 1.0 delivers significant performance improvements over scalar execution, hardware-specific implementation challenges remain. We detail these performance characteristics and discuss the remaining hurdles for RISC-V, including RVV, to become a mainstay in the HPC landscape.
Innovation
Methods, ideas, or system contributions that make the work stand out.
RVV 1.0
HPC Benchmarking
Performance Improvement
Hardware Implementation Challenges
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