🤖 AI Summary
To address the lack of systematic hardware–software co-design methodologies for Vector Symbolic Architectures (VSAs), this paper introduces the first in-memory computing hardware system tailored for hierarchical cognitive computation. Methodologically, it integrates analog, mixed-signal, and digital circuit techniques to establish a cross-layer co-design methodology spanning algorithms, circuits, and architecture—explicitly characterizing the mapping between mathematical operations, learning paradigms, and hardware implementations, along with associated performance trade-offs. Key contributions include: (1) the first efficient hardware mapping of core VSA operations—binding, bundling, and retrieval—within an in-memory computing paradigm; (2) a general, scalable hardware design framework supporting arbitrary VSA models; and (3) bridging the gap between brain-inspired cognitive theory and neuromorphic hardware, providing a reusable methodology and practical guidelines for holistic cognitive computing systems.
📝 Abstract
Vector Symbolic Architectures (VSAs) have been widely deployed in various cognitive applications due to their simple and efficient operations. The widespread adoption of VSAs has, in turn, spurred the development of numerous hardware solutions aimed at optimizing their performance. Despite these advancements, a comprehensive and unified discourse on the convergence of hardware and algorithms in the context of VSAs remains somewhat limited. The paper aims to bridge the gap between theoretical software-level explorations and the development of efficient hardware architectures and emerging technology fabrics for VSAs, providing insights from the co-design aspect for researchers from either side. First, we introduce the principles of vector-symbolic computing, including its core mathematical operations and learning paradigms. Second, we provide an in-depth discussion on hardware technologies for VSAs, analyzing analog, mixed-signal, and digital circuit design styles. We compare hardware implementations of VSAs by carrying out detailed analysis of their performance characteristics and tradeoffs, allowing us to extract design guidelines for the development of arbitrary VSA formulations. Third, we discuss a methodology for cross-layer design of VSAs that identifies synergies across layers and explores key ingredients for hardware/software co-design of VSAs. Finally, as a concrete demonstration of this methodology, we propose the first in-memory computing hierarchical cognition hardware system, showcasing the efficiency, flexibility, and scalability of this co-design approach. The paper concludes with a discussion of open research challenges for future explorations.