🤖 AI Summary
Quantum feature maps often suffer from flat training landscapes and prohibitively long training times. Method: This paper proposes a training-free evolutionary quantum architecture search (QAS) framework that integrates circuit-level heuristics with hardware-aware modeling. Leveraging proxy metrics—including trainability, noise robustness, and expressive power—it enables efficient multi-objective ranking and structural pruning without gradient-based optimization or repeated circuit evaluation. Contribution/Results: Evaluated on simulators and real quantum hardware using quantum support vector machines, the method achieves classification accuracy competitive with state-of-the-art trained approaches while accelerating search by up to 2×. It also markedly improves sampling efficiency and hardware compatibility. The core innovation lies in the first deep integration of training-free proxy evaluation with evolutionary search, establishing a scalable, hardware-friendly paradigm for automated quantum feature map design in quantum machine learning.
📝 Abstract
The quest for effective quantum feature maps for data encoding presents significant challenges, particularly due to the flat training landscapes and lengthy training processes associated with parameterised quantum circuits. To address these issues, we propose an evolutionary training-free quantum architecture search (QAS) framework that employs circuit-based heuristics focused on trainability, hardware robustness, generalisation ability, expressivity, complexity, and kernel-target alignment. By ranking circuit architectures with various proxies, we reduce evaluation costs and incorporate hardware-aware circuits to enhance robustness against noise. We evaluate our approach on classification tasks (using quantum support vector machine) across diverse datasets using both artificial and quantum-generated datasets. Our approach demonstrates competitive accuracy on both simulators and real quantum hardware, surpassing state-of-the-art QAS methods in terms of sampling efficiency and achieving up to a 2x speedup in architecture search runtime.