ChipLingo: A Systematic Training Framework for Large Language Models in EDA

2026-04-30

AI Summary

This work addresses key challenges faced by large language models (LLMs) in electronic design automation (EDA), including insufficient domain knowledge, cross-tool ambiguity, and performance degradation of retrieval-augmented generation (RAG) after fine-tuning. To overcome these issues, the authors propose ChipLingo—the first systematic LLM training framework tailored for EDA—comprising three stages: construction of multi-source question-answering enhanced corpora, domain-adaptive pretraining, and instruction alignment across diverse RAG scenarios. The framework introduces an innovative question-answering augmentation strategy, a parameter-efficient Partial FT fine-tuning method, and explicit modeling of RAG during training to mitigate retrieval capability degradation. Experiments show that ChipLingo-8B achieves 59.7% accuracy on the newly curated EDA-Bench, outperforming same-scale baselines and even some larger general-purpose models, while ChipLingo-32B reaches 70.02%, approaching the performance of leading closed-source models.

Abstract

With the rapid advancement of semiconductor technology, Electronic Design Automation (EDA) has become an increasingly knowledge-intensive and document-driven engineering domain. Although large language models (LLMs) have shown strong general capabilities, applying them directly to EDA remains challenging due to limited domain expertise, cross-tool knowledge confusion, and degraded retrieval-augmented generation (RAG) performance after domain training. To address these issues, this paper presents ChipLingo, a systematic training pipeline for domain-adapted LLMs tailored to EDA scenarios. ChipLingo consists of three stages: domain corpus construction with multi-source data curation and QA augmentation, domain-adaptive pretraining with comparisons of different parameter training strategies, and instruction alignment with RAG scenario training under diverse retrieval conditions. We also curate an internal benchmark, EDA-Bench, covering representative EDA tool scenarios, with plans for public release. Experiments show that ChipLingo-8B achieves 59.7% accuracy on EDA-Bench, outperforming the same-scale base model and some larger general-purpose models. ChipLingo-32B reaches 70.02%, approaching leading closed-source commercial models. Further analysis shows that QA augmentation improves domain performance, Partial FT offers a better balance between adaptation and general capability retention than LoRA, and explicit RAG scenario training mitigates the decline in retrieval utilization after domain training. These results demonstrate the practical value of systematic domain training for knowledge-intensive EDA tasks and provide a foundation for future EDA agents and external-knowledge-driven systems.

Problem

• Electronic Design Automation
• Large Language Models
• Domain Adaptation
• Retrieval-Augmented Generation
• Knowledge-Intensive Tasks

Innovation

• domain-adaptive training
• retrieval-augmented generation (RAG)
• QA augmentation
• parameter-efficient fine-tuning
• EDA-Bench