EMiX: Emulating Beyond Single-FPGA Limits

2026-04-29

AI Summary

This work addresses the challenge that a single FPGA lacks sufficient resources to support full-scale simulation of large-scale multicore RISC-V systems. To overcome this limitation, the authors propose a scalable, multi-FPGA distributed simulation framework that seamlessly maps multicore architectures onto multiple FPGAs through system-level partitioning and an efficient inter-FPGA communication mechanism, enabling cycle-accurate cosimulation without any modifications to the original RTL. Notably, this approach is the first to allow flexible scaling of both core count and FPGA quantity while preserving full system functionality and without requiring RTL reconfiguration. The effectiveness of the framework is demonstrated by successfully simulating a 64-core RISC-V system across eight Alveo U55c FPGAs, achieving a complete Linux boot and validating both functional correctness and scalability of the entire system.

Abstract

FPGA-level emulation is a key step in pre-silicon chip design validation. However, emulating large-scale multi-core systems increasingly exceed the hardware resource capacity of a single FPGA, limiting the feasibility of full-system emulation. To address this challenge, we introduce EMiX, a scalable multi-FPGA framework that enables distributed emulation of multi-core RISC-V architectures beyond single-FPGA resource limits. EMiX systematically partitions a monolithic multi-core design into multiple components and deploys them across multiple interconnected FPGAs, effectively exploiting inter-FPGA interconnects to balance scalability and performance without requiring fundamental RTL redesign. We prototype EMiX with a 64-core architecture across eight interconnected Alveo U55c FPGAs (scalable on core and FPGA counts), successfully demonstrating full-system execution including Linux boot. EMiX will be released as an open-source platform.

Problem

• FPGA emulation
• multi-core systems
• hardware resource limits
• full-system emulation
• pre-silicon validation

Innovation

• multi-FPGA emulation
• RISC-V
• scalable partitioning
• full-system emulation
• hardware emulation