Problem
Research questions and friction points this paper is trying to address.
bulk bitwise operations
3D NAND flash
in-place computing
bit-error rate
multi-level cell
MCFlash: Bulk Bitwise Processing in 3D NAND with Dynamic Sensing and Multi-level Encoding
career value
222K/year
📝 Abstract
This paper presents MCFlash, a practical and immediately deployable technique for executing bulk bitwise operations directly within commercial off-the-shelf(COTS) 3D NAND flash chips. MCFlash relies solely on standard user-mode instructions, combining Multi-Level Cell (MLC) data encodings with dynamically tuned read reference voltages to execute in-place bitwise operations. We evaluate MCFlash across diverse NAND flash chips, both floating-gate and charge-trap variants, from different generations. Our results represent the first demonstration of error-free, on-chip bitwise operations, sustaining over one billion operations on fresh blocks and maintaining bit-error rates below 0.015% even after 10,000 program/erase (P/E) cycles.
Innovation
Methods, ideas, or system contributions that make the work stand out.
in-storage computing
bitwise operations
3D NAND flash
dynamic sensing
multi-level encoding
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