A Semantic Quantum Circuit Cache for Scalable and Distributed Quantum-Classical Workflows

2026-04-29

AI Summary

This work addresses the severe computational redundancy in hybrid quantum-classical workflows caused by semantically equivalent yet syntactically distinct quantum circuits. To mitigate this, the authors propose a content-addressable, semantics-aware circuit caching system that uniquely integrates ZX-calculus reduction with Weisfeiler–Leman graph hashing to generate platform-agnostic, deterministic circuit identifiers. This enables result reuse across executions, hardware backends, and workflow stages. Implemented via LMDB and Redis for distributed caching, the system supports CPU, GPU, and QPU backends. Experiments on MareNostrum 5 demonstrate a 91.98% reduction in redundant simulations for circuit cutting tasks and a 7.0× speedup on a single node. On a 35-qubit superconducting QPU, an 11.2× acceleration is observed, while QAOA optimization avoids 27.6% of circuit evaluations, substantially lowering execution overhead.

Abstract

Hybrid quantum--classical workflows often execute large ensembles of circuits that differ syntactically but implement identical operations, leading to substantial redundant computation. To address this, we introduce the Quantum Circuit Cache, a content-addressable system that detects semantic equivalence and reuses previously computed results across executions, backends, and workflow stages. Our approach combines ZX-calculus reduction with isomorphism-invariant Weisfeiler--Leman graph hashing to generate deterministic circuit identifiers, enabling constant-time lookup in distributed caches supporting both lightweight LMDB and scalable Redis deployments. The system integrates transparently into hybrid HPC workflows and remains backend-agnostic across CPU, GPU, and QPU environments. We evaluate the system on MareNostrum 5 with two representative workloads: distributed wire cutting and Differential Evolution-based QAOA optimization. For wire cutting, caching eliminates up to 91.98% of redundant subcircuit simulations, yielding speedups up to 7.0 times on a single node and maintaining advantages at scale, with Redis-based caching achieving up to 1.6 times speedups under high parallelism. Validation on a 35-qubit superconducting QPU confirms these benefits, achieving an 11.2 times speedup on real hardware. In distributed QAOA optimization, equivalence-aware caching avoids up to 27.6% of circuit evaluations and consistently reduces execution cost without altering the optimization algorithm. In both cases, reuse grows with concurrency and circuit structure, highlighting redundancy as a major systems bottleneck and demonstrating the effectiveness of our Quantum Circuit Cache.

Problem

• quantum circuit redundancy
• semantic equivalence
• hybrid quantum-classical workflows
• distributed caching
• computational overhead

Innovation

• Quantum Circuit Cache
• Semantic Equivalence
• ZX-calculus
• Weisfeiler–Leman Hashing
• Hybrid Quantum-Classical Workflows