The Parameterized Complexity of Scheduling with Precedence Delays: Shuffle Product and Directed Bandwidth

2026-05-05

AI Summary

This study addresses the single-machine scheduling problem with precedence constraints and lateness objectives, investigating its parameterized complexity. By leveraging key parameters—namely, the pathwidth of the associated directed acyclic graph and the maximum lateness—and employing reductions within the XNLP framework, the authors establish for the first time that both Shuffle Product and Directed Bandwidth (including its restriction to trees) are XNLP-complete. This work significantly expands the family of known XNLP-complete problems and provides precise complexity characterizations for several scheduling variants as well as longstanding open combinatorial problems, thereby delineating fundamental theoretical boundaries of computational intractability.

Abstract

In this paper, we study the parameterized complexity of several variants of scheduling with precedence constraints between jobs. Namely, we consider the single machine setting with delay values on top of the precedence constraints. Such scheduling problems are related to several decades-old problems with open parameterized complexity status, notably Shuffle Product and Directed Bandwidth. We obtain XNLP-completeness results for both problems, and derive implications to scheduling with minimum (resp. maximum) delays parameterized by the width of the directed acyclic graph giving the precedence constraints, and/or by the maximum delay value in the input. Regarding Directed Bandwidth, we also settle the case of trees by showing XNLP-completeness parameterized by the target value. Beyond these results, we believe that Shuffle Product is an unusual and promising addition to the list of XNLP-complete problems.

Problem

• scheduling
• precedence constraints
• parameterized complexity
• Shuffle Product
• Directed Bandwidth

Innovation

• XNLP-completeness
• Shuffle Product
• Directed Bandwidth
• parameterized complexity
• precedence delays