Reimagining Voltage-Controlled Cryogenic Boolean Logic Paradigm with Quantum-Enhanced Josephson Junction FETs

📅 2025-07-31
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To address fundamental bottlenecks in superconducting logic devices—including cascading difficulty, insufficient gain, and poor robustness—stemming from current-controlled operation, this work introduces a novel voltage-controlled cryogenic Boolean logic paradigm based on quantum-enhanced Josephson Junction Field-Effect Transistors (JJFETs). By innovatively integrating InAs/GaSb heterostructure JJFETs with multilayer heater-based nanoscale thermal switches (nTrons), we achieve, for the first time, a high-gain (>10), cascadable superconducting voltage-mode logic architecture. A compact Verilog-A model—co-simulated with superconducting nanowire thermal switches and cryogenic circuit design methodologies—successfully validates core logic primitives: NOT, NAND, NOR, majority, and XOR gates. Notably, experimental cascading of modular two-input XOR gates demonstrates scalability toward quantum computing and reversible computing applications.

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📝 Abstract
The growing demand for ultra low power computing and the emergence of quantum technologies have intensified interest in cryogenic electronics, particularly superconducting devices.Despite their promise, current controlled superconducting components face fundamental challenges in cascadability, limiting their effectiveness in complex logic architectures.To overcome this, recent efforts have focused on developing gate tunable superconducting devices, such as Josephson Junction Field Effect Transistors (JJFETs).However, achieving robust control and sufficient supercurrent gain, both critical for transistor-like performance in logic circuits remains a key challenge.A recent advancement in JJFET design, based on InAs and GaSb heterostructures, demonstrates enhanced gain and favorable device characteristics suitable for circuit integration.Building on this innovation, we propose and analyze fundamental voltage controlled logic topologies using the quantum enhanced JJFET. We develop a Verilog A based circuit compatible compact model of the quantum enhanced JJFET which accurately captures the experimentally observed device characteristics.To ensure cascadability, our logic circuits incorporate the multilayered Heater Nanocryotron (nTron), a superconducting nanowire-based thermal switch.Through simulation based analysis, we demonstrate the successful implementation of fundamental logic gates, including NOT, NAND, and NOR. Furthermore, we design a 3 input majority gate, which plays a pivotal role in quantum and reversible computing due to its universality.Finally, to demonstrate the cascadability of our proposed logic topology, we demonstrate the operation of a 2 input XOR gate based on our designed JJFET based NOT, NAND, and NOR gate.
Problem

Research questions and friction points this paper is trying to address.

Overcoming cascadability challenges in superconducting logic circuits
Achieving robust control and supercurrent gain in JJFETs
Developing voltage-controlled cryogenic logic with quantum-enhanced JJFETs
Innovation

Methods, ideas, or system contributions that make the work stand out.

Quantum-enhanced JJFETs for cryogenic logic
Verilog A-based compact JJFET model
Multilayered Heater Nanocryotron for cascadability
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Md Mazharul Islam
Dept. of Electrical Eng. and Computer Sci., University of Tennessee, Knoxville, TN, 37996, USA
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Shamiul Alam
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Assistant Professor, University of Tennessee, Knoxville
Device-Circuit Co-designThreshold SwitchesSpintronicsCryogenic ElectronicsSuperconducting Devices