UniSpike: Accelerating Spiking Neural Networks on Neuromorphic Systems via Eliminating Address Redundancy

2026-05-22

AI Summary

This work addresses the significant communication overhead in multicore neuromorphic systems caused by address redundancy in packet-based spiking communication, where destination addresses can account for up to 49% of total traffic under small payload conditions. To systematically eliminate this redundancy, the authors propose a hardware-software co-design approach that integrates destination-centric spike scheduling, lightweight runtime packet aggregation hardware, and a destination-aware SNN graph partitioning strategy. Experimental results across diverse spiking neural network (SNN) workloads demonstrate that the proposed method reduces communication volume by 1.93× on average, achieving a 1.77× speedup and a 1.50× improvement in energy efficiency.

Abstract

Many-core neuromorphic systems accelerate Spiking Neural Networks (SNNs), yet their packet-based spike communication can spend substantial traffic and energy repeatedly transmitting destination addresses. This overhead is amplified by the small payload of spike packets: in representative workloads, duplicate address transmissions account for up to 49% of the total traffic. This paper presents UniSpike, a hardware-software co-design that removes address redundancy by aggregating spikes destined for the same core into compact packets. UniSpike combines destination-centric spike scheduling, lightweight runtime packet assembly hardware, and destination-aware SNN partitioning. Across diverse SNN workloads, UniSpike reduces traffic by 1.93$\times$ on average, delivering 1.77$\times$ speedup and 1.50$\times$ energy efficiency improvement over state-of-the-art designs.

Problem

• Spiking Neural Networks
• Neuromorphic Systems
• Address Redundancy
• Spike Communication
• Traffic Overhead

Innovation

• spiking neural networks
• neuromorphic systems
• address redundancy elimination
• packet aggregation
• hardware-software co-design