SNNF: An SNN-based Near-Sensor Noise Filter for Dynamic Vision Sensors

2026-05-03

AI Summary

This work addresses the challenge of background activity (BA) noise in dynamic vision sensor (DVS) outputs, which significantly increases computational load. The authors propose SNNF, a near-sensor noise filter that innovatively employs event-based binary image (EBBI) representation to eliminate timestamp dependency. By integrating a single-layer spiking neural network (SNN) classifier with a parallel memory architecture, SNNF enables efficient signal–noise discrimination. Implemented on both FPGA and 65 nm CMOS ASIC platforms, the design achieves an AUC of 0.89 on standard datasets. The FPGA implementation consumes only 40% of the logic resources and 11% of the memory resources compared to state-of-the-art approaches, while delivering a throughput of 29 Meps. The ASIC realization further attains 44.4 Meps throughput, with area and power consumption reduced to 13% and less than 5%, respectively, of those of conventional ANN-based solutions.

Abstract

Dynamic Vision Sensors (DVS) exhibit exceptional dynamic range and low power consumption, making them ideal for edge applications in the Internet of Video Things (IoVT). However, their output is often degraded by spurious Background Activity (BA) noise, leading to unnecessary computational overhead. This paper proposes SNNF, a near-sensor BA noise filter that integrates a compact Event-Based Binary Image (EBBI) representation, a parallel memory architecture, and a single-layer Spiking Neural Network (SNN) classifier. Trained on representative DVS data, the SNN distinguishes signal events from noise with an AUC of 0.89 on standard datasets. The binary-array-based EBBI eliminates timestamp dependency, significantly reducing memory footprint. Moreover, the SNN's spike-based computation replaces power-hungry multipliers with simple accumulation logic and minimizes inter-neuron data width, resulting in an extremely hardware-efficient design. FPGA implementation results show that SNNF reduces memory and logic resources to approximately 11% and 40%, respectively of state-of-the-art filters, while achieving a throughput of 29 Mega events per second (Meps). In a 65 nm CMOS ASIC implementation, SNNF achieves 44.4 Meps with an area and power consumption of only ~13% and <5% of the corresponding ANN-based designs. These results demonstrate that SNNF provides an excellent balance between filtering accuracy and hardware efficiency, making it highly suitable for resource-constrained, near-sensor deployment.

Problem

• Dynamic Vision Sensors
• Background Activity noise
• Near-sensor filtering
• Spiking Neural Network
• Event-based vision

Innovation

• Spiking Neural Network
• Dynamic Vision Sensor
• Near-Sensor Processing
• Event-Based Binary Image
• Hardware Efficiency